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NSE–3
System Module UP8T
Original 11/97
3/A3–10
Layout Diagram of UPT8T – Bottom
(Version 14)
testpoint
name
condition
dc–level
ac–level
J101
FBUS_TX
active state
pulsed DC (0V72.8V)
J104
CCONTCSX (CCONT
chip select)
active state
pulse active 0V, non–active
2.8V
J108
CHRG_CTRL
charger connected
pulsed DC (0V/2.8V)
J220
V5V
active state
nominal 5.0V (min 4.8V, max
5.2V)
J223
CCONTINT (charger,
RTC interrupt)
interrupt
pulse active 2.8V, non–active
0V
J224
VCOBBA
active state
nominal 2.8V (min 2.7V, max
2.85V)
J225
EXTSYSRESETX
power on
reset state 0V, normal state
2.8V
J226
VCXOPWR
power on
active state 2.8V, non–active
0V
J227
PURX (power on reset)
power up/down
reset state 0V, normal state
2.8V
J228
SLEEPCLK (32kHz
clock)
power on
pulsed DC (0V/2.8V)
J235
ROM1SELX
active state
pulse active 0V, non–active
2.8V
J251
AGND
pcb ground
0V
J256
COBBADAX
active state
pulse active 0V, non–active
2.8V
testpoint
name
condition
dc–level
ac–level
J500
Control voltage for UHF
VCO module G600
channel 60
channel 1
channel 124
2.25 +/– 0.25 V
> 0.8 V
< 3.7 V
J504
Control voltage for VHF
VCO circuit
typ. 2.0 –2.2 V min 0.5 / max
4.0 V
J508
VSYN_2 ( regulated
supply for PLLS )
2.8 V min 2.7 / max 2.85 V
J534&J5
36
13 MHz IF output to
N250
–95 dBm @ X540
(ext. RF connector )
RXC at level of full
calibrated gain
typ ca. 1.0 – 1.1 V pulsed
min. 0.7 / max. 1.4 V
typ. 50 mVpp balanced
voltage at 13 MHz
J538
13 MHz output from
Z620 to N620
–95 dBm @ X540
(ext. RF connector )
RXC at level of full
calibrated gain
typ. ca. 1.5 V pulsed
typ. ca 600 uVrms
J542
VHF VCO output ( 232
MHz )
–
typ. 400 mVpp.
> 100 mVpp required
J554
TXC ( TX power control
voltage )
@level 19 typ. ca. 0.6 V pulse
@level 5 typ ca. 1.8 V pulse
J556
TXP ( TX enable )
2.8 V logic level pulse,
( max. 0.8 V ”0” / min 2.0 V ”1” )
J558
TXQP ( other half of
balanced Q–signal )
0.8 V pulsed
400 mVpp
J560
TXIP ( other half of bal-
anced I–signal )
0.8 V pulsed
400 mVpp
Summary of Contents for NSE-3 SERIES
Page 3: ...NSE 3 SeriesTransceivers PAMS Technical Documentation Original 11 97 Chapter 1 Foreword ...
Page 7: ...NSE 3 Series Transceivers PAMS Technical Documentation Original 11 97 Chapter 3 System Module ...
Page 80: ...PAMS Technical Documentation Original 11 97 Chapter 4 UI Module UE4 ...
Page 83: ...PAMS Technical Documentation UI Module UE4 Page 4 4 Original 11 97 Baseband Block Diagram ...
Page 99: ...UIF Module UE4 Original 11 97 4 A3 4 Layout Diagram of UE4 Version 10 ...
Page 100: ...PAMS Technical Documentation Original 08 96 Appendix 1 TRANSCEIVER NSE 3NX ...
Page 139: ...PAMS Technical Documentation Original 11 97 HFU 2 ...
Page 146: ...PAMS Technical Documentation HFU 2 Page 8 Original 11 97 Exploded View of HFU 2 3 2 4 5 1 ...
Page 153: ...PAMS Technical Documentation HFU 2 Page 15 Original 11 97 This page intentionally left blank ...
Page 154: ...PAMS Technical Documentation Original 11 97 CARK 64 Installation Guide ...
Page 158: ...PAMS Technical Documentation CARK 64 Page 5 Original 11 97 This page intentionally left blank ...
Page 159: ...PAMS Technical Documentation Original 11 97 CARK 91 Installation Guide ...
Page 167: ...PAMS Technical Documentation CARK 91 Page 9 Original 11 97 This page intentionally left blank ...
Page 168: ...NSE K B 3 Series Transceivers PAMS Technical Documentation Original 11 97 Service Tools ...
Page 193: ...NSE 3 System Module UP8T Original 11 97 3 A3 1 Block Diagram of System RF Blocks ...
Page 203: ...NSE 3 Series Transceivers PAMS Technical Documentation Original 11 97 Tuning Instructions ...