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NSE–3
System Module UP8T
Original 11/97
3/A3–9
Layout Diagram of UPT8T – Top
(Version 14)
testpoint
name
condition
dc–level
ac–level
J102
FBUS_RX
power on
pulsed DC (0V/2.8V)
J103
MBUS
power on
pulsed DC (0V/2.8V)
J107
LGND
0V
J110
VPP
flash programming
nominal 5V (5V flash) or 3.0V
(3V flash)
J111
WDDISX
power on
reset state 0V, normal state 2.8V
J221
5V
flash programming
nominal 5.0V (5V flash) or 3.0V
(3V flash)
J222
DSPXF
power on
pulse active 0V, non–active 2.8V
J229
MAD selftest
test mode set externally
J230
MAD selftest
test mode set externally
J231
VSIM
SIM power on
nominal 2.8V (3V SIM card) or
5.0V (5V SIM card)
J232
VB (battery voltage in
baseband)
battery connected
nominal 3.6V (min 3.0, max 4.2)
J233
RFCLK
active state
typ. 1.0Vpp (min
0.5Vpp, max
2.0Vpp)
J234
VSRM
power on
nominal 5.5V (min 5V, max 6V)
CCONT switch
mode regulator
ripple voltage
J236
RAMSELX
active state
pulse active 0V, non–active 2.8V
J250
GND
0V
J252
COBBARSTX
power on
reset state 0V, normal state 2.8V
J253
COBBAWRX
active state
pulse active 0V, non–active 2.8V
J254
COBBARDX
active state
pulse active 0V, non–active 2.8V
J255
COBBACLK
active state
pulsed DC (0V/2.8V)
testpoint
name
condition
dc–level
ac–level
J502
Power control op.amp
output voltage to N550
( Vpd, pin )
power level depended
pulsed DC
J506
RFC ( 13 MHz sine-
wave )
0 V
typ. 1.0 Vpp min
0.5/max 2.0 Vpp
J510
VRX ( regulated supply
for RX )
2.8 V min 2.7 / max 2.85 V,
pulsed
J514
VTX ( regulated supply
for TX )
2.8 V min 2.7 / max 2.85 V,
pulsed
J516
VSYN_1 ( regulated
supply for VCOs)
2.8 V min 2.7 / max 2.85 V
J518
VREF_2 ( ref. voltage
for N500 )
1.5 V +/– 1.5%
J520
AFC ( autom. freq. cntrl
)
0 – 2.3 V, typ. 1.15 V ( room
temp. )
J522
VXO ( regulated supply
for VCTCXO )
2.8 V min 2.7 / max 2.85 V
J530
& J532
71 MHz IF input to
N620
–95 dBm @ X540
(ext. RF connector )
typ. ca. 1.2 V pulsed
typ 100 – 140
uVpp balanced
voltage at 71
MHz
J540
13 MHz output from
N620 to Z620
–95 dBm @ X540
(ext. RF connector )
RXC at level of full
calibrated gain
typ. ca. 1.5 V pulsed
typ. ca. 700
uVrms
J550 &
J552
116 MHz TX IF to N500
typ. ca. 1.1 – 1.2 V pulsed
typ. ca. 100
mVrms each
J562
RXC ( receive gain
control voltage )
RX gain setting depended
control range is 0.5 – 1.45 V,
,pulsed.
typ. 1.3–1.4 V for calibrated
maximum gain
Summary of Contents for NSE-3 SERIES
Page 3: ...NSE 3 SeriesTransceivers PAMS Technical Documentation Original 11 97 Chapter 1 Foreword ...
Page 7: ...NSE 3 Series Transceivers PAMS Technical Documentation Original 11 97 Chapter 3 System Module ...
Page 80: ...PAMS Technical Documentation Original 11 97 Chapter 4 UI Module UE4 ...
Page 83: ...PAMS Technical Documentation UI Module UE4 Page 4 4 Original 11 97 Baseband Block Diagram ...
Page 99: ...UIF Module UE4 Original 11 97 4 A3 4 Layout Diagram of UE4 Version 10 ...
Page 100: ...PAMS Technical Documentation Original 08 96 Appendix 1 TRANSCEIVER NSE 3NX ...
Page 139: ...PAMS Technical Documentation Original 11 97 HFU 2 ...
Page 146: ...PAMS Technical Documentation HFU 2 Page 8 Original 11 97 Exploded View of HFU 2 3 2 4 5 1 ...
Page 153: ...PAMS Technical Documentation HFU 2 Page 15 Original 11 97 This page intentionally left blank ...
Page 154: ...PAMS Technical Documentation Original 11 97 CARK 64 Installation Guide ...
Page 158: ...PAMS Technical Documentation CARK 64 Page 5 Original 11 97 This page intentionally left blank ...
Page 159: ...PAMS Technical Documentation Original 11 97 CARK 91 Installation Guide ...
Page 167: ...PAMS Technical Documentation CARK 91 Page 9 Original 11 97 This page intentionally left blank ...
Page 168: ...NSE K B 3 Series Transceivers PAMS Technical Documentation Original 11 97 Service Tools ...
Page 193: ...NSE 3 System Module UP8T Original 11 97 3 A3 1 Block Diagram of System RF Blocks ...
Page 203: ...NSE 3 Series Transceivers PAMS Technical Documentation Original 11 97 Tuning Instructions ...