NI PXI-4204, User Manual

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Contents
© National Instruments Corporation vii NI PXI-4204 User Manual
Figure 2-6. Ground-Referenced Signal Connection.................................................2-9
Figure 2-7. Recommended Shielded Ground-Referenced Signal Connection.........2-10
Figure 2-8. Alternative Shielded Ground Referenced Signal Connection ...............2-11
Figure 2-9. High CMV Connection .........................................................................2-12
Figure 2-10. Shielded High CMV Connection ..........................................................2-13
Figure 3-1. Block Diagram of NI PXI-4204 ............................................................3-2
Figure 3-2. Effect of Input Impedance on Signal Measurements ............................3-5
Figure 3-3. AI CONV CLK Signal Routing ............................................................3-8
Figure 3-4. NI PXI-4204 PXI Trigger Bus Signal Connection................................3-10
Figure 3-5. Typical Program Flowchart...................................................................3-12
Figure 3-6. LabVIEW Channel Property Node with Filtering Enabled
at 10 kHz and SS/H Enabled .................................................................3-18
Figure 3-7. General Synchronizing Flowchart.........................................................3-20
Figure A-1. NI PXI-4204 Dimensions ......................................................................A-6
Figure B-1. Typical Posttriggered Sequence ............................................................B-2
Figure B-2. Typical Pretriggered Sequence..............................................................B-2
Figure B-3. AI START TRIG Input Signal Timing .................................................B-3
Figure B-4. AI START TRIG Output Signal Timing...............................................B-3
Figure B-5. AI REF TRIG Input Signal Timing.......................................................B-4
Figure B-6. AI REF TRIG Output Signal Timing ....................................................B-5
Figure B-7. AI SAMP CLK Input Signal Timing ....................................................B-6
Figure B-8. AI SAMP CLK Output Signal Timing..................................................B-6
Figure B-9. AI CONV CLK Input Signal Timing ....................................................B-7
Figure B-10. AI CONV CLK Output Signal Timing .................................................B-8
Figure B-11. AI SAMPLE CLK TIMEBASE Signal Timing ....................................B-9
Figure B-12. AI HOLD COMPLETE Signal Timing.................................................B-10
Figure C-1. Injector/Ejector Handle Position Before Device Removal....................C-2
Tables
Table 3-1. Signal Conditioning Functional Blocks ...............................................3-3
Table 3-2. PXI Trigger Bus Timing Signals...........................................................3-10
Table 3-3. NI-DAQmx Properties .........................................................................3-14
Table 3-4. Programming a Task in LabVIEW .......................................................3-16
Table 3-5. Synchronizing the NI PXI-4204 Using LabVIEW................................3-21
Table A-1. Maximum Sampling Rates ....................................................................A-1