NXAMP4x1
8
NXAMP4x1
NXAMP4x1
B
A
C
D
E
F
G
H
2
1
3
4
5
28CA1-2001022111-50
Input_Amp
(PCB INANL)
Input_VR
(PCB Control)
ADC buffer
(PCB Control)
Digital Domain
DAC buffer
(PCB Control)
Output_VR
(PCB Control)
Power_Amp
(PCB PAANL)
-14dB
Fixed Gain
0.25dB step
Variable Gain
+6dB
Fixed Gain
-0.4dB
Fixed Gain
+37dB
Fixed Gain
Maximum Input
Voltage
+28.0dBu
Sensitivity
+10.0dBu
MAXMUM
LEVEL
+38.8dBu
+1.8dBu
+5.8dBu
+6.2dBu
+7.5dBu
+1.5dBu
-4.0dBu
+14.0dBu
-14.0dB
-12.5dB
+5.5dB
+6.0dB
-0.4dB
-4.0dB
-96dB
0.25dB step
Variable Gain
Note:
The solid line shows the gain structure in the analog test mode of the test program mode.
The broken line shows an example in the setting that allows the maximum input signal level.
NXAMP4x1 LEVEL DIAGRAM
This level diagram is for the purpose of circuit design only.
The actual gain structure will depend on the firmware that is used.
■
BLOCK DIAGRAM 5/5
Summary of Contents for NXAMP4X1
Page 36: ...NXAMP4x1 36 B B CONTROL Circuit Board Pattern side 2NA WJ97120 10 2 ...
Page 37: ...NXAMP4x1 37 B B Pattern side 2NA WJ97120 10 2 ...
Page 40: ...NXAMP4x1 40 OUTANL Circuit Board 2NA WJ97320 10 Pattern side ...
Page 44: ...NXAMP4x1 44 B B PN AN Circuit Board 2NA WJ97170 10 1 Pattern side ...
Page 45: ...NXAMP4x1 45 2NA WJ97170 10 1 B B Pattern side ...
Page 49: ...NXAMP4x1 49 2NA WJ97350 50 B A Component side Reduction 7 10 ...
Page 50: ...NXAMP4x1 50 B B PSANL Circuit Board 2NA WJ97350 50 Pattern side Reduction 7 10 ...
Page 51: ...NXAMP4x1 51 B B 6 5 4 3 2 1 7 8 9 10 11 12 2NA WJ97350 50 Pattern side Reduction 7 10 ...
Page 123: ...PA 011884 ...