DWC-HD
Rev.
2
3.8 Video processing block
The video processing block consists of a
gain and offset
adjustment, and a video payload
legalizer
.
3.8.1 Gain and offset
The gain and offset adjustment is done separately on the Y, Cb and Cr samples.
Range
Gyda
Resolution
Luma gain
0 – 32767 (0-4x)
15bit
Chroma gain
0 – 32767 (0-4x)
15bit
Luma offset (gain = 1)
-4095 – 4095
13bit
Chroma offset (gain = 1)
-2047 – 2047
12bit
3.8.2 Video payload legalizer
The legalizer hard clips the upper and lower limit of the video payload. With the legalizer
enabled the limits are:
Upper limit
Luma:
3ACh
Chroma: 3C0h
Lower limit
Luma:
040h
Chroma:
040h
With the legalizer disabled, the video processing block hard clips both luma and chroma to
3FBh and 004h.
3.9 EDH processing block
If enabled, the EDH processing block extracts the EDH package from the video, updates the
EDH flags according to SMPTE RP165 and inserts the EDH package into the ancillary data
of the video.
If disabled, The EDH processing block only reads, process and report the EDH package
without changing it in video stream.
3.10 Video output selection
The board has four digital outputs and group of three analog outputs. The four digital outputs
are organized as two pairs, each consisting of an inverting and a non-inverting output. Each
pair and the analog group can take their signal directly from the re-clocker or from the output
of the processing unit. In Gyda the direct paths are labeled
Through
and the processing
paths are labeled
Processed
.
3.11 Video DAC
The video DAC has three configurable outputs, with the following combinations available:
-
CVBS/CVBS/CVBS
-
CVBS/Y/C
-
Y/Pb/Pr
-
R/G/B
This setting only applies to SD video. When HD video is routed to the video DAC, the output
will always be YPbPr. For CVBS and S-Video the following modulations are available:
network-electronics.com
|
15
