N720 OpenLinux
Hardware User Guide
Copyright © Neoway Technology Co., Ltd
48
3.4.2 WLAN
Signal
Pin
I/O
Function
Remarks
WCI_LTE_RXD
48
DI
WLAN/LTE
co-exist
control receive
Function 2 of this pin is
USB_BOOT.
WCI_LTE_TXD
50
DO
WLAN/LTE
co-exist
control transmit
DVDD_XO_1P8
53
PO 1.8V power output
Used only to connect to WLAN
chipset oscillator.
Do not use it to load any other
components.
WLAN_SDIO_CMD
54
B
SDIO command
WLAN_SDIO_CLK
55
DO
Clock signal output of
SDIO interface
WLAN_SDIO_DATA0
56
B
SDIO data bit 0
WLAN_SDIO_DATA1
57
B
SDIO data bit 1
WLAN_SDIO_DATA2
58
B
SDIO data bit 2
WLAN_SDIO_DATA3
59
B
SDIO data bit 3
WLAN_EN
62
DO WLAN enable
WLAN_PWR_EN
63
DO
WLAN
power
supply
enable
WAKE_ON_WIRELESS 60
DO WLAN wakeup pin
Used for some QCA chipset
WLAN_SLEEP_CLK
61
DO WLAN sleep clock
Clock frequency: 32.768 KHz
Table 3-14 SDIO/WLAN feature parameters
Mode
IO Level (V)
Max Clock Frequency (MHz)
Timing Mode
SDR
1.8
200
DS, HS, SDR12, SDR25, SDR50,
SDR104
DDR
50
DDR50
WLAN uses SDIO 3.0 interface. Figure 3-42 shows the WLAN connection.
