NEC uPD72256, Preliminary User'S Manual

Page: 288 / 343

8.9.6.5 DRWPERFTRIGGER - Performance counters control register
The Drawing Engine will increment the performance counters DRWPERFCOUNT1
and DRWPERFCOUNT1 on every event selected by DRWPERFTRIGGER.
Access This register can be written in 32-bit units.
Address <DrwE_Base> + D4
H
Index 53
Initial Value 0000 0000
H
. This register is initialized by any reset.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
PERFTRIGGER2
W
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PERFTRIGGER1
W
Bit Bit name Function
31 to 16
PERFTRIGGER
2
Selects the internal event that will increment DRWPERFCOUNT2 register.
0 disable performance counter
1 Drawing Engine active cycles
2 framebuffer read access
3 framebuffer write access
4 texture read access
5 invisible pixels (enumerated but selected with alpha 0%)
6 invisible pixels while internal FIFO is empty (lost cycles)
7 display list reader active cycles
8 framebuffer read hits
9 framebuffer read misses
10 framebuffer write hits
11 framebuffer write misses
12 texture read hits
13 texture read misses
31 every clock cycle (for use as timer)
15 to 0
PERFTRIGGER
1
Same as above, but for performance counter 1.
Chapter 8 Drawing Engine
288
Preliminary User's Manual S19203EE1V3UM00