User’s Manual U14362EJ2V1UM
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CHAPTER 4 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
This chapter describes differences between the target device’s signal lines and the signal lines of the IE-789026-
NS-EM1’s target interface circuit.
Although the target device is a CMOS circuit, the IE-789026-NS-EM1’s target interface circuit consists of an
emulation CPU, TTL, CMOS-IC, and other components.
When the IE system is connected with the target system for debugging, the IE system performs emulation so as to
operate as the actual target device would operate in the target system.
However, some minor differences exist since the operations are performed via the IE system’s emulation.
(1) Signals input to or output from the evaluation chip and peripheral evaluation chip
(2) Signals input from the target system via a gate
(3) Other signals
The IE-789026-NS-EM1’s circuit is used as follows for signals listed in (1) to (3) above.
(1) Signals input to or output from the evaluation chip and peripheral evaluation chip
The following signals perform the same operations as in the
µ
PD789026 Subseries. However, a 1 M
Ω
pull-down
resistor and 100
Ω
resistor are inserted in series for the signals related to ports. Refer to
Figure 4-1 Equivalent
Circuit 1 of Emulation Circuit
.
•
Signals related to port 0
•
Signals related to port 1
•
Signals related to port 2
•
Signals related to port 3
•
Signals related to port 4
•
Signals related to port 5
(2) Signals input from the target system via a gate
Since the following signals are input via a gate, their timing shows a delay compared to the
µ
PD789026
Subseries.
•
RESET signal
•
X1 signal
Refer to
Figure 4-3 Equivalent Circuit 3 of Emulation Circuit
.
