CHAPTER 1 OVERVIEW
User’s Manual U16348EJ1V0UM
11
1.2
Features
{
General-purpose usage available in V850E series products in which a debug control unit is mounted
{
Debug control unit control interface mounted
{
Branch PC trace via the trace packet data method (including on-chip cache execution)
{
Data access trace via the trace packet data method
{
ROM emulation function
{
The dimensions of the IE-70000-MC-NW-A are as follows.
Parameter
Value
Operating voltage
5 V±5%
Current consumption
500 mA (TYP.)
Height
26 mm
Width
160 mm
External dimensions
(refer to
APPENDIX PACKAGE DRAWINGS
)
Depth
162 mm
Weight
250 g
1.3
Function Specifications
Table 1-1. Function Specifications (1/2)
Parameter
Specification
Target device
Device in which a debug control unit is mounted
Operating voltage of target device: 3.0 to 3.6 V
Interface clock (DCK)
25 MHz
Number of interface signal pins
5
Debug control unit
interface
(execution control block)
Functions of interface signal
pins
•
DCK:
Interface clock input
•
DMS:
Interface mode select output
•
DDI:
Interface data input
•
DDO:
Interface data output
•
DRST(
−
):
Debug control unit reset output
Trace clock (TRCLK)
100 MHz (max.)
Number of trace signal pins
6
Functions of trace signal pins
•
TRCCLK:
Trace clock input
•
TRCDATA[3:0]: Trace data input
•
TRCEND:
Trace data end point indication input
Trace packet data length
8 to 256 bits (in 8-bit units)
Trace memory capacity
•
3 MB (including 1 MB of time stamp storage memory)
Number of trace packet data
… Approximately 200 K (min.) to 2 M (max.)
•
Any size between 24 and 3 MB specifiable in 24-byte units
Debug control unit
interface
(trace control block)
Trace start
•
Trace event
(Incorporated in debug control unit)
•
Trace forcible start
(Incorporated in debug control unit)
