20205206
Horizontal Resolution: 1 µs/div.
Trace 1: Current sense voltage across RE15. 0.5V/div.
Trace 2: The input current from the AUX power source. 100 mA/div
FIGURE 8. Cycle-by-cycle Peak Current Limit under 48V
PoE Input and Output Dead Short Condition
Figure 9 shows key waveforms of over-current protection by
the hot swap MOSFET’s dc current limit. The PoE input volt-
age is at 38V. The input current exceeds the 800 mA current
limit of the hot swap MOSFET, and causes the voltage at the
RTN pin to rise rapidly. It also discharges the soft start ca-
pacitor CE26 connected to the SS pin, and the circuit enters
the automatic retry mode as long as the over-current condition
is present.
20205207
Horizontal Resolution: 5 ms/div.
Trace 1: The voltage of the RTN pin (referenced to the VEE pin). 0.5V/div.
Trace 2: The PoE input current. 0.5A/div
FIGURE 9. Retry Mode under 38V PoE Input and Output
Over Current Condition
STEP RESPONSE
Figure 10 shows the step load response at Vin equal to 48V.
The load current changes in step between 1A and 7A.
20205208
Horizontal Resolution: 0.5 ms/div.
Trace 1: Load current step changes between 1A and 7A. 2A/div.
Trace 2: The 3.3V output voltage response (AC coupled). 0.5V/div.
FIGURE 10. Output Voltage Step Load Response
RIPPLE CURRENT AND VOLTAGE
Figure 11 and Figure 12 show the PoE and AUX input ripple
current, respectively, under full load. In both cases, the input
ripple current is attenuated to less than 10 mA pk-pk by the
input filter.
20205209
Horizontal Resolution: 50 µs/div.
Trace 1: The PoE input current ripples (AC coupled). 20 mAV/div.
Trace 2: The FFT of Trace 1. Horizontal 500 kHz/div. Vertical 5 mA/div
FIGURE 11. PoE Input Current Ripples under Full Load
11
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