National Instruments VXI Series, Getting Started

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Glossary
VXIpc Controller for VxWorks G-2 ni.com
ANSI American National Standards Institute
ASIC Application-Specific Integrated Circuit
B
B bytes
backplane an assembly, typically a printed circuit board, with 96-pin connectors and
signal paths that bus the connector pins. A C-size VXIbus system has
two sets of bused connectors called J1 and J2. A D-size VXIbus system
has three sets of bused connectors called J1, J2, and J3.
BERR* Bus Error Signal
BIOS Basic Input/Output System. BIOS functions are the fundamental level
of any PC or compatible computer. BIOS functions embody the basic
operations needed for successful use of the computer’s hardware resources.
BSP Board Support Package. A set of files that defines how a VxWorks
operating system image is created for a given target.
BTO See Bus Timeout Unit
Bus Timeout Unit a functional module that times the duration of each data transfer
and terminates the cycle if the duration is excessive. Without the
termination capability of this module, a bus master attempt to access a
nonexistent slave could result in an indefinitely long wait for a slave
response.
byte order how bytes are arranged within a word or how words are arranged within a
longword. Motorola ordering stores the most significant byte (MSB) or
word first, followed by the least significant byte (LSB) or word. Intel
ordering stores the LSB or word first, followed by the MSB or word.
C
CLK10 a 10 MHz, ±100 ppm, individually buffered (to each module slot),
differential ECL system clock that is sourced from Slot 0 of a VXIbus
mainframe and distributed to Slots 1 through 12 on P2. It is distributed to
each slot as a single-source, single-destination signal with a matched delay
of under 8 ns.