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Chapter 2

Using the Module

Connecting Resolver Signals

This section provides information regarding connecting resolver signals. Figure 2-6 shows the 
connections made between a resolver and the PXIe-4340 using the TB-4340 terminal block. A 
single resolver requires the use of two synchronized channels. The excitation of either channel, 
but not both, can be used. Both channels must be configured for remote sense to guarantee 
accuracy.

Figure 2-6.  

Resolver Connections

Connecting Synchro Signals

This section provides information regarding connecting synchro signals. Figure 2-7 shows the 
connections made between a synchro and the PXIe-4340 using the TB-4340 terminal block. A 
single synchro requires the use of three synchronized channels. The excitation of any one of the 
synchronized channels can be used, but all channels must be configured for remote sense to 
guarantee accuracy.

Figure 2-7.  

Synchro Connections

Co

s

ine

AI0+

AI0–

S

ine

AI1+

AI1–

R

S

0+, R

S

1+

R

S

0–, R

S

1–

EX+

EX–

AI0+, AI2–

S

t

a

tor

s

AI0–, AI1+

AI1–, AI2+

R

S

0–, R

S

1–, R

S

2–

EX–

R

S

0+, R

S

1+, R

S

2+

EX+

Rotor

Summary of Contents for PXIe-4340

Page 1: ...SC Express NI PXIe 4340 User Manual 4 Ch 24 bit 25 6 kS s Simultaneous AC LVDT Input Module NI PXIe 4340 User Manual May 2016 377014A 01...

Page 2: ...mail addresses and current events National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 866 ASK MYNI 275 6964 For further support information refer t...

Page 3: ...ESS FOR A PARTICULAR PURPOSE TITLE OR NON INFRINGEMENT AND ANY WARRANTIES THAT MAY ARISE FROM USAGE OF TRADE OR COURSE OF DEALING NI DOES NOT WARRANT GUARANTEE OR MAKE ANY REPRESENTATIONS REGARDING TH...

Page 4: ...es independent from National Instruments and have no agency partnership or joint venture relationship with National Instruments Patents For patents covering National Instruments products technology re...

Page 5: ...ion 2 10 Overcurrent Detection 2 11 Signal Acquisition Considerations 2 11 Excitation Verification 2 11 Demodulation 2 11 ADC 2 11 Operation Modes 2 11 Buffered Mode Acquisitions 2 12 Buffered Mode Fi...

Page 6: ...igure 2 3 4 Wire Connection to an LVDT or RVDT 2 5 Figure 2 4 5 Wire Connection to an LVDT or RVDT 2 5 Figure 2 5 6 Wire Connection to an LVDT or RVDT 2 5 Figure 2 6 Resolver Connections 2 6 Figure 2...

Page 7: ...User Guide and Terminal Block Specifications document for step by step software and hardware installation instructions Note For a complete list of terminal blocks supported by a specific release of NI...

Page 8: ...lable on the version specific download page or installation media Caution To ensure the specified EMC performance operate this product only with shielded cables and shielded accessories Use only twist...

Page 9: ...t signal is zero If the core moves to the left the left secondary is more strongly coupled to the primary than the right secondary resulting in a stronger induced voltage in the left secondary and an...

Page 10: ...ocations with Resulting Induced Voltage and Phase Secondary Primary Secondary Output Signal Core EOUT EIN EIN EIN EOUT EOUT Core at Center Secondary Primary Secondary Output Signal Core Core Left of C...

Page 11: ...three secondaries stators that produce three simultaneous signals proportional to the sine of the shaft position each offset by 120 Therefore synchros can measure over 360 of rotation with a unique c...

Page 12: ...ection to an LVDT or RVDT Figure 2 4 5 Wire Connection to an LVDT or RVDT Figure 2 5 6 Wire Connection to an LVDT or RVDT Note The PXIe 4340 does not require connection to the center tap of 5 and 6 wi...

Page 13: ...e to guarantee accuracy Figure 2 6 Resolver Connections Connecting Synchro Signals This section provides information regarding connecting synchro signals Figure 2 7 shows the connections made between...

Page 14: ...of the excitation source and adjusts its amplitude against an internal reference The PXIe 4340 does not support external adjustment Module Pinout Table 2 1 shows the pinout of the front connector of t...

Page 15: ...27 NC NC NC 26 AIGND EX1 AI1 25 NC EX1 AI1 24 NC RS1 RS1 23 NC NC NC 22 NC NC NC 21 NC NC NC 20 NC NC NC 19 NC NC NC 18 NC NC NC 17 NC NC NC 16 NC NC NC 15 NC NC NC 14 AIGND EX2 AI2 13 NC EX2 AI2 12 N...

Page 16: ...irection Description AIGND Analog Input Ground AI 0 3 Input Positive inputs of the differential analog input channels 0 to 3 AI 0 3 Input Negative inputs of the differential analog input channels 0 to...

Page 17: ...tects the increase in voltage and reports this condition to software The PXIe 4340 also senses the impedance connected to the excitation lines and reports a high impedance connection to Digital Sine G...

Page 18: ...age measured because the higher impedance is more sensitive to loading from the verification instrument Demodulation The PXIe 4340 digitizes oversampled data which is digitally demodulated The digital...

Page 19: ...in addition to the filtering provided by the demodulator This means that the digital filter bandwidth increases until reaching the full bandwidth of the demodulation filter where it stops increasing...

Page 20: ...nally generated on the PXIe 4340 using the sample rate configured with a NI DAQmx task During Buffered acquisitions the device may wait to transfer data to the host machine to build larger bus transac...

Page 21: ...k signal Maximum HWTSP Rate Analysis During HWTSP acquisitions the maximum achievable acquisition rate without missing a sample is affected by both the transfer and application time Refer to Figure 2...

Page 22: ...e is acquired and the time the AO stimulus is generated is 500 s Refer to Figure 2 12 Figure 2 12 Input and Output of a Control System with Bandwidth 2 kHz To make sure that your application can run a...

Page 23: ...the application time or by using an excitation frequency in a faster demodulation latency range Timing and Triggering This section contains information about timing and triggering Sample Clock Timebas...

Page 24: ...tart trigger This restriction is a result of the way the module compensates for the filter group delay When using an analog reference trigger the module first waits for the specified number of pre tri...

Page 25: ...and slave modules generate their ADC oversample clock from the shared 100 MHz reference clock from the PXI Express backplane PXIe_CLK100 The backplane supplies an identical copy of this clock to each...

Page 26: ...find example VIs in the NI Example Finder Select Help Find Examples to launch the NI Example Finder Consider the following caveat to using Reference Clock Synchronization The PXIe 4340 automatically...

Page 27: ...vide power to the accessories as well as digital communication lines This allows software to detect when accessories are inserted or removed In addition software can automatically identify the specifi...

Page 28: ...eral slot in a PXI Express chassis PXIe_SYNC100 allows modules using PXIe_CLK100 as their reference to recreate the timing of the PXI_CLK10 signal while taking advantage of the lower skew of PXIe_CLK1...

Page 29: ...slot of a PXI system but the system will not be able to use the Star Trigger feature PXIe_DSTAR A C PXI Express devices can provide high quality and high frequency point to point connections between...

Page 30: ...fy your systems accuracy and reliability requirements and provides warranty sparing and calibration services to help you maintain accuracy and minimize downtime over the life of your system Visit ni c...

Page 31: ...tions Engineers make sure every question submitted online receives an answer Software Support Service Membership The Standard Service Program SSP is a renewable one year subscription included with alm...

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