© National Instruments
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NI PXI-6683 Series User Manual
Note Regarding PFI0
Since PFI0 is a dual-purpose terminal capable of performing digital I/O like the other PFI lines
while also being capable of receiving IRIG-B AM and DC inputs, care is taken to protect the
digital circuitry when PFI0 is being used as an IRIG-B AM input. This is achieved with a
normally-open solid-state relay (SSR), which is closed only when digital operations for the line
are enabled through the API. Digital operations include setting up routes in which PFI0 is the
source or the destination, enabling timestamping for PFI0, scheduling future time events or
clocks for PFI0, and setting IRIG-B DC as the time reference.
The SSR has a 5 ms open and close time. Therefore, care must be taken when using PFI0 to
ensure correct operation when the SSR is switching.
To avoid issues due to the SSR switching, follow these guidelines:
•
Whenever timestamping begins on PFI0, either ensure the input will remain at a logic low
state for at least 5 ms or disregard timestamps for at least 5 ms.
•
When setting up PFI0 as an output (future time events or clocks), ensure that PFI0 is driven
low for at least 5 ms after the line is set up. Alternately, ensure that the external receiver can
tolerate a slow rising edge.
•
Before disabling PFI0 set up as an output, drive the output low to avoid a very slow ramp
down.
•
Any time a route is set up or changed where PFI0 is the source or the destination, allow for
a 5 ms settling time.
For more information, refer to KnowledgeBase
4E9BT88P
at
ni.com/support
.
Brief Overview of PXI Synchronization Features
PCI eXtensions for Instrumentation (PXI) is a rugged PC-based platform that offers a
high-performance, low-cost deployment solution for measurement and automation systems. PXI
combines the Peripheral Component Interconnect (PCI) electrical bus with the rugged, modular
Eurocard mechanical packaging of CompactPCI and adds specialized synchronization buses and
key software features.