7-8
|
ni.com
Chapter 7
Counters
Pulse Measurement
In pulse measurements, the counter measures the high and low time of a pulse on its Gate input
signal after the counter is armed. A pulse is defined in terms of its high and low time, high and
low ticks or frequency and duty cycle, which is similar to the pulse-width measurement, except
that the inactive pulse is measured as well.
You can route an internal or external periodic clock signal (with a known period) to the Source
input of the counter. The counter counts the number of rising (or falling) edges occurring on the
Source input between two edges of the Gate signal.
You can calculate the high and low time of the Gate input by multiplying the period of the Source
signal by the number of edges returned by the counter.
Refer to the following sections for more information about X Series pulse measurement options:
•
•
Implicit Buffered Pulse Measurement
•
Sample Clocked Buffered Pulse Measurement
•
Hardware-Timed Single Point Pulse Measurement
Single Pulse Measurement
Single (on-demand) pulse measurement is equivalent to two single pulse-width measurements
on the high (H) and low (L) ticks of a pulse, as shown in Figure 7-8.
Figure 7-8.
Single (On-Demand) Pulse Measurement
Implicit Buffered Pulse Measurement
In an implicit buffered pulse measurement, on each edge of the Gate signal, the counter stores
the count in the FIFO. A DMA controller transfers the stored values to host memory.
The counter begins counting when it is armed. The arm usually occurs between edges on the
Gate input, but the counting does not start until the desired edge. You can select whether to read
the high pulse or low pulse first using the StartingEdge property in NI-DAQmx.
Co
u
nter
Armed
G
a
te
S
o
u
rce
H L
7 10
7
10
L
a
tched
V
a
l
u
e
9
8
7
6
5
4
3
2
1
5
6
4
3
2
1
Summary of Contents for PCIe-6323
Page 1: ...PCIe 6323...
