© National Instruments
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7-7
Figure 7-6 shows an example of an implicit buffered pulse-width measurement.
Figure 7-6.
Implicit Buffered Pulse-Width Measurement
Sample Clocked Buffered Pulse-Width Measurement
A Sample Clocked Buffered pulse-width measurement is similar to single pulse-width
measurement, but buffered pulse-width measurement takes measurements over multiple pulses
correlated to a sample clock.
The counter counts the number of edges on the Source input while the Gate input remains active.
On each sample clock edge, the counter stores the count in the FIFO of the last pulse width to
complete. A DMA controller transfers the stored values to host memory.
Figure 7-7 shows an example of a sample clocked buffered pulse-width measurement.
Figure 7-7.
Sample Clocked Buffered Pulse-Width Measurement
Hardware-Timed Single Point Pulse-Width Measurement
A hardware-timed single point (HWTSP) pulse-width measurement has the same behavior as a
sample clocked buffered pulse-width measurement.
Note
If a pulse does not occur between sample clocks, an overrun error occurs.
Note
(NI USB-634
x
/635
x
/636
x
Devices)
USB X Series devices do not support
hardware-timed single point (HWTSP) operations.
For information about connecting counter signals, refer to the
section.
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GATE
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a
te
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o
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rce
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mple Clock
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Summary of Contents for PCIe-6323
Page 1: ...PCIe 6323...
