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Glossary

©

National Instruments Corporation

G-5

PCI-DIO-96 User Manual

M

m

meters

max

maximum

MB

megabytes of memory

min.

minutes

min

minimum

MSB

most significant bit

O

OBF*

output buffer full signal

P

PA, PB, PC <0..7>

port A, B, or C 0 through 7 lines

PCI

Peripheral Component Interconnect—a high-performance expansion
bus architecture originally developed by Intel to replace ISA and EISA.
It is achieving widespread acceptance as a standard for PCs and
work-stations; it offers a theoretical maximum transfer rate of 132
Mbytes/s.

port

a digital port, consisting of four or eight lines of digital input and/or
output

PPI

programmable peripheral interface

R

RD*

read signal

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Summary of Contents for PCI-DIO-96

Page 1: ...PCI DIO 96 User Manual A 96 Bit Parallel Digital I O Interface for PCI Bus Computers January 1997 Edition Part Number 320938B 01 Copyright 1996 1997 National Instruments Corporation All Rights Reserved ...

Page 2: ...nmark 45 76 26 00 Finland 09 527 2321 France 01 48 14 24 24 Germany 089 741 31 30 Hong Kong 2645 3186 Israel 03 5734815 Italy 02 413091 Japan 03 5472 2970 Korea 02 596 7456 Mexico 5 520 2635 Netherlands 0348 433466 Norway 32 84 84 00 Singapore 2265886 Spain 91 640 0085 Sweden 08 730 49 70 Switzerland 056 200 51 51 Taiwan 02 377 1200 U K 01635 523545 National Instruments Corporate Headquarters 6504...

Page 3: ...S OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brought within one year after the cause of action accrues National Instruments shall not be liable for any delay in pe...

Page 4: ......

Page 5: ...Get Started 1 2 Software Programming Choices 1 2 National Instruments Application Software 1 2 NI DAQ Driver Software 1 3 Register Level Programming 1 4 Optional Equipment 1 5 Custom Cabling 1 5 Unpacking 1 6 Chapter 2 Installation and Configuration Software Installation 2 1 Hardware Installation 2 1 Board Configuration 2 2 Chapter 3 Signal Connections I O Connector 3 1 I O Connector Pin Descripti...

Page 6: ...ter Description Format 5 3 Register Description for the 82C55A 5 3 Register Description for the 82C53 5 5 Register Description for the Interrupt Control Registers 5 6 Interrupt Control Register 1 5 7 Interrupt Control Register 2 5 9 Interrupt Clear Register 5 10 Chapter 6 Programming PCl Local Bus 6 1 Programming Examples 6 1 PCI Initialization for the PC 6 3 PCI Initialization for the Macintosh 6...

Page 7: ...g Example 6 16 Mode 2 Bidirectional Bus 6 16 Port C Status Word Bit Definitions for Bidirectional Data Path Port A Only 6 18 Mode 2 Bidirectional Bus Programming Example 6 19 Interrupt Handling 6 20 Interrupt Programming Examples for the 82C55A 6 20 Mode 1 Strobed Input Programming Example 6 21 Mode 1 Strobed Output Programming Example 6 21 Mode 2 Bidirectional Bus Programming Example 6 21 Program...

Page 8: ...5A 5 4 Figure 5 2 Control Word Format for the 82C53 5 6 Figure 6 1 Control Word to Configure Port A for Mode 1 Input 6 10 Figure 6 2 Control Word to Configure Port B for Mode 1 Input 6 11 Figure 6 3 Port C Pin Assignments on I O Connector when Port C Configured for Mode 1 Input 6 13 Figure 6 4 Control Word to Configure Port A for Mode 1 Output 6 14 Figure 6 5 Control Word to Configure Port B for M...

Page 9: ...o get started software programming choices and optional equipment describes custom cabling options and explains how to unpack the PCI DIO 96 Chapter 2 Installation and Configuration describes how to install and configure your PCI DIO 96 board Chapter 3 Signal Connections describes how to make input and output signal connections to your PCI DIO 96 via the board I O connector Chapter 4 Theory of Ope...

Page 10: ... following conventions are used in this manual bold Bold text denotes menu items function panel items and dialog box buttons or options bold italic Bold italic text denotes a note caution or warning italic Italic text denotes emphasis a cross reference or an introduction to a key concept Macintosh Macintosh refers to all Macintosh computers with PCI bus unless otherwise noted monospace Text in thi...

Page 11: ...d read It gives an overview of the SCXI system and contains the most commonly needed information for the modules chassis and software Your SCXI hardware user manuals If you are using SCXI read these manuals next for detailed information about signal connections and module configuration They also explain in greater detail how the module works and contain application hints Your DAQ hardware user man...

Page 12: ... Instruments document contains information that you may find helpful as you read this manual Application Note 025 Field Wiring and Noise Considerations for Analog Signals The following documents also contain information that you may find helpful as you read this manual Your computer s technical reference manual PCI Local Bus Specification Revision 2 0 Customer Communication National Instruments wa...

Page 13: ...r 16 bit digital I O application The OKI Semiconductor 82C53 counter timer chip has two usable counters that can generate timed interrupt requests to your computer The digital I O lines are all accessible through a 100 pin female connector The PCI DIO 96 is a completely switchless and jumperless DAQ board All resource allocation is completed automatically at startup so you will not need to set int...

Page 14: ...s with the NI DAQ instrument driver or you can register level program National Instruments Application Software ComponentWorks contains tools for data acquisition and instrument control built on NI DAQ driver software ComponentWorks provides a higher level programming interface for building virtual instruments through standard OLE controls and DLLs With ComponentWorks you can use all of the config...

Page 15: ...rsion buffered data acquisition high speed A D conversion analog output D A conversion waveform generation timed D A conversion digital I O counter timer operations SCXI RTSI self calibration messaging and acquiring data to memory NI DAQ has both high level DAQ I O functions for maximum ease of use and low level DAQ I O functions for maximum flexibility and performance Examples of high level funct...

Page 16: ...ime consuming and inefficient and is not recommended for most users Even if you are an experienced register level programmer consider using NI DAQ or other National Instruments application software to program your National Instruments DAQ hardware Using NI DAQ ComponentWorks LabVIEW or LabWindows CVI software is easier than and as flexible as register level programming and can save weeks of develo...

Page 17: ...modules boards and accessories including conditioning for strain gauges and RTDs simultaneous sample and hold and relays For more information about optional equipment available from National Instruments refer to your National Instruments catalog or call the office nearest you Custom Cabling National Instruments offers cables and accessories for you to prototype your application or to use if you fr...

Page 18: ...ing the board take the following precautions Ground yourself via a grounding strap or by holding a grounded object Touch the antistatic package to a metal part of your computer chassis before removing the board from the package Remove the board from the package and inspect the board for loose components or any other sign of damage Notify National Instruments if the board appears damaged in any way...

Page 19: ...e installed in any unused PCI expansion slot in your computer The following are general installation instructions Consult your computer user manual or technical reference manual for specific instructions and warnings 1 Turn off your computer 2 Remove the top cover or access port to the I O channel 3 Remove the expansion slot cover on the back panel of the computer 4 Insert the PCI DIO 96 in an unu...

Page 20: ...nfigurable The PCI DIO 96 is fully compliant with the PCI Local Bus Specification Revision 2 0 Therefore all board resources are automatically allocated by the PCI system including the base address and interrupt level The base address for the PCI DIO 96 is mapped into PCI memory space You do not need to perform any configuration steps after the system powers up ...

Page 21: ...that exceed any of the maximum ratings of input or output signals on the PCI DIO 96 can damage the PCI DIO 96 board and your computer The description of each signal in this chapter includes information about maximum input ratings National Instruments is NOT liable for any damages resulting from signal connections that exceed these maximum ratings I O Connector Pin Descriptions Figures 3 1 and 3 2 ...

Page 22: ...able 5 V APA0 APA1 APA2 APA3 APA4 APA5 APA6 APA7 APB0 APB1 APB2 APB3 APB4 APB5 APB6 APB7 APC0 APC1 APC2 APC3 APC4 APC5 APC6 APC7 GND BPA1 BPA2 BPA4 BPA5 BPA6 BPA7 BPA0 BPA3 BPB0 BPB1 BPB2 BPB3 BPB4 BPB5 BPB6 BPB7 BPC0 BPC1 BPC2 BPC3 BPC4 BPC5 BPC6 BPC7 49 50 47 48 45 46 43 44 41 42 39 40 37 38 35 36 33 34 31 32 29 30 27 28 25 26 23 24 21 22 19 20 17 18 15 16 13 14 11 12 9 10 7 8 5 6 3 4 1 2 ...

Page 23: ... 5 V CPA0 CPA1 CPA2 CPA3 CPA4 CPA5 CPA6 CPA7 CPB0 CPB1 CPB2 CPB3 CPB4 CPB5 CPB6 CPB7 CPC0 CPC1 CPC2 CPC3 CPC4 CPC5 CPC6 CPC7 GND DPA1 DPA2 DPA4 DPA5 DPA6 DPA7 DPA0 DPA3 DPB0 DPB1 DPB2 DPB3 DPB4 DPB5 DPB6 DPB7 DPC0 DPC1 DPC2 DPC3 DPC4 DPC5 DPC6 DPC7 99 100 97 98 95 96 93 94 91 92 89 90 87 88 85 86 83 84 81 82 79 80 77 78 75 76 73 74 71 72 69 70 67 68 65 66 63 64 61 62 59 60 57 58 55 56 53 54 51 52 ...

Page 24: ...t B of PPI B BPB7 is the MSB BPB0 the LSB 33 35 37 39 41 43 45 47 APA 7 0 Bidirectional data lines for port A of PPI A APA7 is the MSB APA0 the LSB 34 36 38 40 42 44 46 48 BPA 7 0 Bidirectional data lines for port A of PPI B BPA7 is the MSB BPA0 the LSB 49 99 5 V supply 5 Volts These pins are fused for up to 1 A total of 4 65 to 5 25 V 50 100 GND Ground These pins are connected to the computer gro...

Page 25: ...rks LabWindows CVI and LabVIEW documentation refers to them as handshaking and no handshaking These signal assignments are the same for all four 82C55A PPIs Refer to Port Identification in Chapter 6 Programming for more information 83 85 87 89 91 93 95 97 CPA 7 0 Bidirectional data lines for port A of PPI C CPA7 is the MSB CPA0 the LSB 84 86 88 90 92 94 96 98 DPA 7 0 Bidirectional data lines for p...

Page 26: ...ing OBFA ACKA IBFA STBA INTRA I O I O I O Indicates that the signal is active low Subscripts A and B denote port A or port B handshaking signals Input logic high voltage 2 2 V minimum 5 3 V maximum Input logic low voltage 0 3 V minimum 0 8 V maximum Maximum input current 0 Vin 5 V 1 µA minimum 1 µA maximum Output logic high voltage at 3 7 V minimum Iout 2 5 mA Output logic low voltage 0 4 V maximu...

Page 27: ...or digital output and PPI C port B is configured for digital input Digital input applications include receiving TTL signals and sensing external device states such as the state of the switch in Figure 3 3 Digital output applications include sending TTL signals and driving external devices such as the LED shown in Figure 3 3 41 43 45 47 67 69 71 73 50 100 GND PCI DIO 96 Board Switch I O Connector 5...

Page 28: ... lists the timing specifications for handshaking with the PCI DIO 96 The handshaking lines STB and IBF synchronize input transfers The handshaking lines OBF and ACK synchronize output transfers Table 3 3 describes the connector pins on the PCI DIO 96 I O connector by pin number and gives the signal name and description of each signal connector pin Table 3 3 Signal Names Used in Timing Diagrams Nam...

Page 29: ...l generated from the control lines of the computer I O expansion bus WR Internal Write This signal is the write signal generated from the control lines of the computer I O expansion bus DATA Bidirectional Data Lines at the Specified Port This signal indicates the availability of data on the data lines at a port that is in the output mode If the port is in the input mode this signal indicates when ...

Page 30: ...er in mode 1 are as follows Figure 3 4 Timing Specifications for Mode 1 Input Transfer Name Description Minimum Maximum T1 STB Pulse Width 100 T2 STB 0 to IBF 1 150 T3 Data before STB 1 20 T4 STB 1 to INTR 1 150 T5 Data after STB 1 50 T6 RD 0 to INTR 0 200 T7 RD 1 to IBF 0 150 All timing values are in nanoseconds DATA RD INTR IBF STB T1 T2 T4 T7 T6 T3 T5 ...

Page 31: ...n output transfer in mode 1 are as follows Figure 3 5 Timing Specifications for Mode 1 Output Transfer Name Description Minimum Maximum T1 WR 0 to INTR 0 250 T2 WR 1 to Output 200 T3 WR 1 to OBF 0 150 T4 ACK 0 to OBF 1 150 T5 ACK Pulse Width 100 T6 ACK 1 to INTR 1 150 All timing values are in nanoseconds WR OBF INTR ACK DATA T1 T2 T3 T4 T5 T6 ...

Page 32: ...Specifications for Mode 2 Bidirectional Transfer Name Description Minimum Maximum T1 WR 1 to OBF 0 150 T2 Data before STB 1 20 T3 STB Pulse Width 100 T4 STB 0 to IBF 1 150 T5 Data after STB 1 50 T6 ACK 0 to OBF 1 150 T7 ACK Pulse Width 100 T8 ACK 0 to Output 150 T9 ACK 1 to Output Float 20 250 T10 RD 1 to IBF 0 150 All timing values are in nanoseconds T1 T6 T7 T3 T4 T10 T2 T5 T8 T9 WR OBF INTR ACK...

Page 33: ...eory of Operation This chapter contains a functional overview of the PCI DIO 96 and explains the operation of each functional unit comprising the PCI DIO 96 Functional Overview The block diagram in Figure 4 1 illustrates the key functional components of the PCI DIO 96 board ...

Page 34: ...us Specification 2 0 The base memory address and interrupt level for the board are stored inside the MITE at power on You do not need to set any switches or jumpers I O Connector Interrupt Control Circuitry Port A Port B Port C Port A Port B Port C Port A Port B Port C Port A Port B Port C 8 8 8 8 8 8 8 8 8 8 8 8 MITE PCI Interface Circuitry Interrupt 1 Data Bus Interrupt Bus Interrupt PCI 1 A Fus...

Page 35: ...different modes The PCI DIO 96 uses two of the counters to generate interrupt requests the third counter is not used and is not accessible Refer to Chapter 5 Register Map and Description or to Appendix C MSM82C53 Data Sheet for more detailed information Interrupt Control Circuitry Two software controlled registers determine which devices if any generate interrupts Each of the four 82C55A devices h...

Page 36: ...IO 96 interrupt control circuitry Figure 4 2 PCI DIO 96 Interrupt Control Circuitry Block Diagram CLK0 GATE0 OUT0 CLK1 GATE1 OUT1 CLK2 GATE2 OUT2 2 MHz 5 V 5 V 82C55A PPI A 82C55A PPI B 82C55A PPI D 82C55A PPI C PCI Interrupt PC3 PC0 PC3 PC0 PC3 PC0 82C53 Counter Timer PC3 PC0 Interrupt Control Circuitry PCI DIO 96 Interrupt Control Registers ...

Page 37: ...are four 82C55A PPI devices on the board they are referenced as PPI A PPI B PPI C and PPI D when differentiation is required The three 16 bit counters of the 82C53 are accessed through individual data ports and controlled by one 8 bit control word The control word selects how the counter data ports are accessed and what mode the counter uses The configuration bits are defined in the section Regist...

Page 38: ...bit 8 bit Read and write Read and write Read and write Write only PPI B PORTA Register PORTB Register PORTC Register Configuration Register 04 05 06 07 8 bit 8 bit 8 bit 8 bit Read and write Read and write Read and write Write only PPI C PORTA Register PORTB Register PORTC Register Configuration Register 08 09 0A 0B 8 bit 8 bit 8 bit 8 bit Read and write Read and write Read and write Write only PP...

Page 39: ...ter with the MSB bit 7 shown on the left and the LSB bit 0 shown on the right A rectangle with the bit name inside represents each bit The bit map for the Interrupt Clear Register states not applicable no bits used The data is ignored when you write to this register therefore any bit pattern will suffice Register Description for the 82C55A Figure 5 1 shows the two control word formats used to comp...

Page 40: ...t reset format of port C Figure 5 1 Control Word Formats for the 82C55A D7 D6 D5 D4 D3 D2 D1 D0 Group A Group B Mode Selection 00 Mode 0 01 Mode 1 1X Mode 2 Control Word Flag 1 Mode Set Port A 1 Input 0 Output Port C high nibble 1 Input 0 Output Port C low nibble 1 Input 0 Output Port B 1 Input 0 Output Mode Selection 0 Mode 0 1 Mode 1 a Control Word Flag Mode Set bit 7 1 D7 D6 D5 D4 D3 D2 D1 D0 C...

Page 41: ...ntrol word select the counter to be programmed Bits 5 and 4 select the mode by which the count data is written to and read from the selected counter Bits 3 2 and 1 select the mode for the selected counter Bit 0 selects whether the counter counts in binary or BCD format Table 5 2 Port C Set Reset Control Words Bit Number Bit Set Control Word Bit Reset Control Word Bit Set or Reset in Port C 0 0xxx0...

Page 42: ...r register has a master interrupt enable bit and two bits for the timed interrupt circuitry Of the latter two bits one bit enables counter interrupts while the other selects counter 0 or counter 1 The bit maps and signal definitions are listed in this chapter D7 D6 D5 D4 D3 D2 D1 D0 Counter Select 00 Counter 0 01 Counter 1 10 Counter 2 11 Illegal Access Mode 00 Latch counter value 01 Access LSB on...

Page 43: ...r 2 are both set PPI D sends an interrupt INTRA to the computer If this bit is cleared PPI D does not send the interrupt INTRA to the computer regardless of the setting of INTEN 5 CIRQ1 PPI C Port B Interrupt Enable Bit If this bit and the INTEN bit in Interrupt Control Register 2 are both set PPI C sends an interrupt INTRB to the computer If this bit is cleared PPI C does not send the interrupt I...

Page 44: ... set PPI B sends an interrupt INTRA to the computer If this bit is cleared PPI B does not send the interrupt INTRA to the computer regardless of the setting of INTEN 1 AIRQ1 PPI A Port B Interrupt Enable Bit If this bit and the INTEN bit in Interrupt Control Register 2 are both set PPI A sends an interrupt INTRB to the computer If this bit is cleared PPI A does not send the interrupt INTRB to the ...

Page 45: ...r Interrupt Enable Bit If this bit is set the 82C53 counter outputs can interrupt the computer If this bit is cleared the counter outputs have no effect 0 CTR1 Counter Select Bit If this bit is set the output from counter 1 of the 82C53 is connected to the interrupt request circuitry In this mode counter 0 of the 82C53 acts as a frequency scaler for counter 1 which generates the interrupt If CTR1 ...

Page 46: ...associated with it Use this register to reset the state of the interrupt request signal once the interrupt routine has been entered To clear the interrupt perform an 8 bit write to this register address the data is irrelevant Address Base address 16 hex Type Write only Word Size 8 bit Bit Map Bit Name Description 7 0 X Don t care bit 7 6 5 4 3 2 1 0 X X X X X X X X ...

Page 47: ... 32 bit bus with multiplexed address and data lines The PCI system arbitrates and assigns resources through software freeing you from manually setting switches and jumpers Bus related resources must be configured before you attempt to execute a register level program This entails assigning a base address and interrupt channel to the PCI DIO 96 You can use PCI local bus boards on both PC compatible...

Page 48: ... of PPI A Port B Register Base Address 0x01 Port C Address of PPI A Port C Register Base Address 0x02 8255Cnfg Address of PPI A Configuration Register Base Address 0x03 Ctr0 Address of 82C53 Counter 0 Register Base Address 0x10 Ctr1 Address of 82C53 Counter 1 Register Base Address 0x11 CntrCnfg Address of 82C53 Configuration Register Base Address 0x13 IREG1 Address of Interrupt Control Register 1 ...

Page 49: ...nal Instruments vendor ID 0x1093 and PCI DIO 96 device ID 0x0160 If a board is found the algorithm stores all the board s configuration information into a data structure Base Address Register 0 BAR0 corresponds to the base address of the MITE while Base Address Register 1 BAR1 is the base address of the board registers The size of each of these windows is 4 KB Both addresses will most likely be ma...

Page 50: ... the memory range to which you re map the board is not being used by another device or system resource You can exclude this memory from use with a memory manager PCI Initialization for the Macintosh Programming Options To program at the register level you must know the PCI DIO 96 base memory address and you must install an interrupt handler to generate interrupts Both of these operations are diffi...

Page 51: ...l to do simple accesses with the board If you want to use interrupts you must work directly with the Macintosh Operating System OS and you could inadvertently corrupt portions of NI DAQ Therefore National Instruments recommends this option only if you are not generating interrupts If you need or want to use interrupts either use the driver toolkit mentioned earlier or develop your own method Devel...

Page 52: ...pMgrConfigReadLong deviceNode LogicalAddress 0x00000014L cardBaseAddress activate the standard i o window unsigned long miteBaseAddress 0x000000c0L EndianSwap32Bit cardBaseAddress 0xffffff00L 0x00000080L return the base address of the board return void cardBaseAddress Port Identification This manual refers to each port as A B and C and each PPI 82C55A as A B C and D NI DAQ and LabVIEW documentatio...

Page 53: ...c I O Mode 1 Strobed I O Mode 2 Bidirectional bus The 82C55A also has a single bit set reset feature for port C which is programmed by the 8 bit control word For additional information refer to Appendix B MSM82C55A Data Sheet Mode 0 This mode can be used for simple input and output operations for each port No handshaking is required a specified port simply writes to or reads from data Table 6 1 Po...

Page 54: ...nterrupt generation and enable disable functions are available Mode 2 This mode can be used for communication over a bidirectional 8 bit bus Handshaking signals are used in a manner similar to mode 1 Mode 2 is available for use in group A only port A and the upper nibble of port C Other features of this mode include the following One 8 bit bidirectional port port A and a 5 bit control status port ...

Page 55: ...1 Output Output Input Input 4 10001000 Output Input Output Output 5 10001001 Output Input Output Input 6 10001010 Output Input Input Output 7 10001011 Output Input Input Input 8 10010000 Input Output Output Output 9 10010001 Input Output Output Input 10 10010010 Input Output Input Output 11 10010011 Input Output Input Input 12 10011000 Input Input Output Output 13 10011001 Input Input Output Input...

Page 56: ...appropriately in the control word if you want to use the other ports in combination with the example In mode 1 the digital I O bits are divided into two groups group A and group B Each of these groups contains one 8 bit port and one 4 bit control data port The 8 bit port can be either an input or an output port and the 4 bit port is used for control and status information for the 8 bit port The tr...

Page 57: ...ure 6 2 Control Word to Configure Port B for Mode 1 Input During a mode 1 data read transfer read port C to obtain the status of the handshaking lines and interrupt signals See the Port C Status Word Bit Definitions for Input Ports A and B Port C Status Word Bit Definitions for Output Ports A and B and Port C Status Word Bit Definitions for Bidirectional Data Path Port A Only sections later in thi...

Page 58: ... has been loaded into the input latch for port A 4 INTEA Interrupt Enable Bit for Port A Setting this bit enables interrupts from port A of the 82C55A Control this bit by setting resetting PC4 3 INTRA Interrupt Request Status for Port A When INTEA and IBFA are high this bit is high indicating that an interrupt request is pending for port A 2 INTEB Interrupt Enable Bit for Port B Setting this bit e...

Page 59: ...PPI A for mode 1 input Write 8255Cnfg 0xB0 Set mode 1 port A is an input Loop until IBFA PC5 is set indicating that data is available in port A to be read Read PortA Now read the data from port A Mode 1 Strobed Output Note For mode 1 examples you must configure the don t care bits appropriately in the control word if you want to use the other ports in combination with the example The control word ...

Page 60: ...5 Notice that port B does not have extra input or output lines from port C Figure 6 5 Control Word to Configure Port B for Mode 1 Output During a mode 1 data write transfer you can obtain the status of the handshaking lines and interrupt signals by reading port C Notice that the bit definitions are different for a write and a read transfer Port C bits PC4 and PC5 1 Input 0 Output D7 D6 D5 D4 D3 D2...

Page 61: ...t Output These bits can be used for general purpose I O when port A is in mode 1 output If these bits are configured for output you must use the port C bit set reset function to manipulate them 3 INTRA Interrupt Request Status for Port A When INTEA and OBFA are high this bit is high indicating that an interrupt request is pending for port A 2 INTEB Interrupt Enable Bit for Port B Setting this bit ...

Page 62: ...te data to port A Mode 2 Bidirectional Bus Note For mode 2 examples you must configure the don t care bits appropriately in the control word if you want to use the other ports in combination with the example Mode 2 has an 8 bit bus that can transfer both input and output data without changing the configuration The data transfers are synchronized with handshaking lines in port C This mode uses only...

Page 63: ...onal Data Bus During a mode 2 data transfer you can obtain the status of the handshaking lines and interrupt signals by reading port C The port C status word bit definitions for a mode 2 transfer are shown as follows Port C PC 2 0 1 Input 0 Output D7 D6 D5 D4 D3 D2 D1 D0 1 1 X X X 1 0 1 0 1 0 Port B 1 Input 0 Output Group B Mode 0 Mode 0 1 Mode 1 ...

Page 64: ...ables output interrupts from port A of the 82C55A Control this bit by setting resetting PC6 5 IBFA Input Buffer Acknowledgment for Port A A high setting indicates that data has been loaded into the input latch of port A 4 INTE2 Interrupt Enable Bit for Port A Input Interrupts Setting this bit enables input interrupts from port A of the 82C55A Control this bit by setting resetting PC4 3 INTRA Inter...

Page 65: ... Mode 2 Bidirectional Bus Programming Example The following example shows how to configure PPI A for mode 2 input and output Write 8255Cnfg 0xC0 Set mode 2 port A is bidirectional Loop until OBFA PC7 is set indicating that the data last written to port A has been read Write PortA Data Write data to port A Loop until IBFA PC5 is set indicating that data is available in port A to be read Read PortA ...

Page 66: ...2C53 counter outputs program the counters as described in the Interrupt Programming Example section later in this chapter You can use external signals to interrupt the PCI DIO 96 when port A or port B is in mode 0 and the low nibble of port C is configured for input If port A is in mode 0 use PC3 to generate an interrupt if port B is in mode 0 use PC0 to generate an interrupt After you have config...

Page 67: ... output Write 8255Cnfg 0x0D Set PC6 to enable interrupts from 82C55A Write IREG2 0x04 Set INTEN bit Write IREG1 0x01 Set AIRQ0 to enable PPI A port A interrupts Mode 2 Bidirectional Bus Programming Example The following example shows how to set up interrupts for mode 2 output transfers Write 8255Cnfg 0xC0 Set mode 2 port A is bidirectional Write 8255Cnfg 0x0D Set PC6 to enable interrupt from 82C55...

Page 68: ...ou use counter 1 to interrupt the computer counter 0 is a frequency scale that feeds the source input for counter 1 In this case configure both counters for rate generation or mode 2 To determine the time between pulses generated by counter 0 multiply the load value by 500 ns 1 2 MHz To determine the time between pulses generated by counter 1 multiply the load value by the time between pulses of c...

Page 69: ...en you are ready to exit your program disable the counter and interrupts as shown below Write Cnfg 0x30 Turn off counter 0 Write IREG2 0x00 Disable all PCI DIO 96 interrupts Note In order for any of the interrupts to be processed you must write and install an interrupt service routine Failure to do so could cause the system to fail upon the interrupt generation ...

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Page 71: ...ns are typical at 25 C unless otherwise noted Digital I O Number of channels 96 I O Compatibility TTL Reference voltage 5 V Power on state Inputs High Z pulled up through 100 kΩ Digital logic levels Level Min Max Input low voltage Input high voltage 0 3 V 2 2 V 0 8 V 5 3 V Output low voltage Iout 2 5 mA Output high voltage Iout 40 µA Iout 2 5 mA 4 2 V 3 7 V 0 4 V ...

Page 72: ...sical Dimensions 13 7 x 10 7 cm 5 4 x 4 2 in I O connector 100 pin female 0 050 series D type Environment Operating temperature 0 to 70 C Storage temperature 55 to 150 C Relative humidity 5 to 90 noncondensing 1 Transfer rate depends on the computer and software These tests were made using either a Power Macintosh 8500 120 MHz computer or a Pentium 133 MHz computer Language Macintosh PC Ca 900 kHz...

Page 73: ...endix contains a manufacturer data sheet for the MSM82C55A CMOS programmable peripheral interface OKI Semiconductor This interface is used on the PCI DIO 96 Copyright OKI Semiconductor 1993 Reprinted with permission of copyright owner All rights reserved OKI Semiconductor Microprocessor Data Book 1993 ...

Page 74: ...s appendix contains a manufacturer data sheet for the MSM82C53 CMOS programmable interval timer OKI Semiconductor This timer is used on the PCI DIO 96 Copyright OKI Semiconductor 1993 Reprinted with permission of copyright owner All rights reserved OKI Semiconductor Microprocessor Data Book 1993 ...

Page 75: ...ems does not answer your questions we offer fax and telephone support through our technical support centers which are staffed by applications engineers Electronic Services National Instruments has BBS and FTP sites dedicated for 24 hour support with a collection of files and documents to answer most common customer questions From these sites you can also download the latest instrument drivers upda...

Page 76: ...ource from which you purchased your software to obtain support Telephone Fax Australia 03 9879 5166 03 9879 6277 Austria 0662 45 79 90 0 0662 45 79 90 19 Belgium 02 757 00 20 02 757 03 11 Canada Ontario 905 785 0085 905 785 0086 Canada Quebec 514 694 8521 514 694 4399 Denmark 45 76 26 00 45 76 26 02 Finland 09 527 2321 09 502 2930 France 01 48 14 24 24 01 48 14 24 14 Germany 089 741 31 30 089 714 ...

Page 77: ..._______________________________________________ _______________________________________________________________________________ National Instruments hardware product model __________ Revision _______________________ Configuration ___________________________________________________________________ National Instruments software product ___________________________ Version ____________ Configuration _...

Page 78: ...other __________________ Software version ______________________________________________________________ Other Products Computer make and model ______________________________________________________ Microprocessor _______________________________________________________________ Clock frequency or speed _______________________________________________________ Type of video board installed ___________...

Page 79: ...___________________________________________________ _______________________________________________________________________________ _______________________________________________________________________________ _______________________________________________________________________________ _______________________________________________________________________________ ____________________________...

Page 80: ...DIO 96 User Manual Glossary Numbers Symbols degrees greater than greater than or equal to less than negative of or minus Ω ohms per percent Prefix Meaning Value p pico 10 12 n nano 10 9 µ micro 10 6 m milli 10 3 k kilo 103 M mega 106 G giga 109 ...

Page 81: ... PPI A port A interrupt enable bit AIRQ1 PPI A port B interrupt enable bit ANSI American National Standards Institute APA PPI A port A APB PPI A port B APC PPI A port C ASIC Application Specific Integrated Circuit AWG American Wire Gauge B BIRQ0 PPI B port A interrupt enable bit BIRQ1 PPI B port B interrupt enable bit BPA PPI B port A BPB PPI B port B BPC PPI B port C ...

Page 82: ...uses the personal computer to collect measure and generate electrical signals DI digital input DIO digital input output DIRQ0 PPI D port A interrupt enable bit DIRQ1 PPI D port B interrupt enable bit DMA direct memory access a method by which data can be transferred to from computer memory from to a device or memory on the bus while the processor does something else DMA is the fastest method of tr...

Page 83: ...l signal in inches INTE1 port A output interrupt enable bit INTE2 port A input interrupt enable bit INTEA port A interrupt enable bit INTEB port B interrupt enable bit INTEN interrupt enable bit INTRA port A interrupt request status INTRB port B interrupt request status I O input output L LED light emitting diode LSB least significant bit ...

Page 84: ...rough 7 lines PCI Peripheral Component Interconnect a high performance expansion bus architecture originally developed by Intel to replace ISA and EISA It is achieving widespread acceptance as a standard for PCs and work stations it offers a theoretical maximum transfer rate of 132 Mbytes s port a digital port consisting of four or eight lines of digital input and or output PPI programmable periph...

Page 85: ... only high level signals are sent to DAQ boards in the noisy PC environment signal conditioning the manipulation of signals to prepare them for digitizing STB strobe input signal T TTL transistor transistor logic typ typical V V volts VDC volts direct current VI virtual instrument a combination of hardware and or software elements typically used with a PC that has the functionality of a classic st...

Page 86: ...gramming example 6 10 Mode 1 strobed input 6 10 to 6 13 control word configuration Port A figure 6 10 Port B figure 6 11 Port C pin assignments figure 6 13 Port C status word bit definitions 6 12 to 6 13 programming example 6 13 Mode 1 strobed output 6 13 to 6 16 control word configuration Port A figure 6 14 Port B figure 6 14 Port C pin assignments figure 6 16 Port C status word bit definitions 6...

Page 87: ...ster Group control word format figure 5 6 82C55A Register Group control word formats figure 5 4 Port C set reset control words table 5 5 Mode 1 strobed input Port A configuration figure 6 10 Port B configuration figure 6 11 Mode 1 strobed output Port A configuration figure 6 14 Port B configuration figure 6 14 Mode 2 bidirectional bus figure 6 17 CPA 7 0 signal table 3 5 CPB 7 0 signal table 3 4 C...

Page 88: ... bit Mode 1 strobed input 6 12 Mode 1 strobed output 6 15 INTEB bit Mode 1 strobed input 6 12 Mode 1 strobed output 6 15 INTEN bit 5 9 interrupt control circuitry block diagram 4 4 theory of operation 4 3 Interrupt Control Register Group address map table 5 3 Interrupt Clear Register 5 10 Interrupt Control Register 1 5 7 to 5 8 Interrupt Control Register 2 5 9 interrupt generation developing your ...

Page 89: ...derations 6 10 to 6 13 control word to configure Port A figure 6 10 control word to configure Port B figure 6 11 Port C pin assignments on I O connector figure 6 13 Port C status word bit definitions for input 6 12 to 6 13 programming example 6 13 timing figure 3 10 Mode 1 output interrupt programming example 6 21 overview and features 6 8 strobed output programming considerations 6 13 to 6 16 con...

Page 90: ...O 96 block diagram 4 2 configuration 2 2 custom cabling 1 5 optional equipment 1 5 overview 1 1 requirements for getting started 1 2 software programming choices 1 2 to 1 3 ComponentWorks 1 2 LabVIEW application software 1 2 LabWindows CVI application software 1 3 NI DAQ driver software 1 3 to 1 4 register level programming 1 4 unpacking 1 6 physical specifications A 2 Port C pin assignments corre...

Page 91: ...configure Port A figure 6 10 control word to configure Port B figure 6 11 Port C pin assignments on I O connector figure 6 13 Port C status word bit definitions for input 6 12 to 6 13 programming example 6 13 Mode 1 strobed output 6 13 to 6 16 control word to configure Port A figure 6 14 control word to configure Port B figure 6 14 Port C pin assignments on I O connector figure 6 16 Port C status ...

Page 92: ...5 Port C pin assignments 3 5 to 3 6 power connections 3 8 timing specifications 3 8 to 3 12 Mode 1 input timing 3 10 Mode 1 output timing 3 11 Mode 2 bidirectional timing 3 12 signal names used in timing diagrams table 3 8 to 3 9 simpleaccessesusingGet_DAQ_device_Info 6 5 single bit set reset feature 6 8 software installation 2 1 software programming choices 1 2 to 1 4 ComponentWorks 1 2 LabVIEW a...

Page 93: ... I 8 National Instruments Corporation signal names used in timing diagrams table 3 8 to 3 9 U unpacking the PCI DIO 96 1 6 W WR signal description table 3 9 Mode 1 output timing figure 3 11 Mode 2 bidirectional timing figure 3 12 ...

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