National Instruments PCI-6601, User Manual

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Chapter 2 Device Overview
NI 660x User Manual 2-8 ni.com
Transfer Rates
The maxim
u
m s
u
stainable transfer rate a TIO device can achieve for a
b
u
ffered acq
u
isition depends on the following factors:
• Amo
u
nt of available b
u
s bandwidth
• Processor speed and operating system
• Application software
To red
u
ce the amo
u
nt of b
u
s activity, limit the n
u
mber of devices
generating b
u
s cycles. Beca
u
se direct-memory access (DMA) transfers are
faster than interr
u
pt-driven transfers, NI-DAQmx
u
ses DMA by defa
u
lt for
b
u
ffered acq
u
isitions.
Note The maxim
u
m s
u
stainable transfer rate is always lower than the peak transfer rate.
Table 2-1 lists the maxim
u
m transfer rates for TIO devices.
Note Transfer rates may vary depending on yo
u
r comp
u
ter hardware, operating system
and system activity. This benchmark data was determined on an AMD Athlon XP 1800
comp
u
ter with 128 MB of PC-2100 DDR RAM r
u
nning Windows XP and LabVIEW
u
sing
Table 2-1. Maximum Transfer Rates
Operation
DMA Interrupt
Buffer Size
(Samples) Rate (kS/s)
Buffer Size
(Samples) Rate (kS/s)
Finite
100 5,000 100 77
1,000 2,150 1,000 77
10,000 1,600 10,000 77
100,000 1,350 100,000 77
Continuous
100 44 100 7
1,000 202 1,000 46
10,000 212 10,000 75
100,000 245 100,000 76
defa
u
lt 212 defa
u
lt 75