11-4
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Chapter 11
Triggering
In above-level analog triggering mode, shown in Figure 11-4, the trigger is generated when
the signal value is greater than Level.
Figure 11-4.
Above-Level Analog Triggering Mode
•
Analog Edge Triggering with Hysteresis
—Hysteresis adds a programmable voltage
region above or below the trigger level that an input signal must pass through before the
DAQ device recognizes a trigger condition, and is often used to reduce false triggering due
to noise or jitter in the signal.
–
Analog Edge Trigger with Hysteresis (Rising Slope)—When using hysteresis with a
rising slope, you specify a trigger level and amount of hysteresis. The high threshold
is the trigger level; the low threshold is the trigger level minus the hysteresis.
For the trigger to assert, the signal must first be below the low threshold, then go above
the high threshold. The trigger stays asserted until the signal returns below the low
threshold. The output of the trigger detection circuitry is the internal Analog
Comparison Event signal, as shown in Figure 11-5.
Figure 11-5.
Analog Edge Triggering with Hysteresis Rising Slope Example
Level
An
a
log Comp
a
ri
s
on Event
An
a
log Comp
a
ri
s
on Event
Hy
s
tere
s
i
s
High thre
s
hold
(Level)
Low thre
s
hold
(Level – Hy
s
tere
s
i
s
)
Fir
s
t
s
ign
a
l m
us
t go
b
elow low thre
s
hold.
Then
s
ign
a
l m
us
t
go
ab
ove high thre
s
hold
b
efore
An
a
log Comp
a
ri
s
on Event
ass
ert
s
.
Summary of Contents for PCI-6281
Page 1: ...PCI 6281...