Chapter 4
Signal Connections
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National Instruments Corporation
4-23
PCI-4451/4452/4453/4454 User Manual
GPCTR0_SOURCE Signal
Any PFI pin can receive as an input the GPCTR0_SOURCE signal, which
is available as an output on the PFI8/GPCTR0_SOURCE pin.
As an input, the GPCTR0_SOURCE signal is configured in the
edge-detection mode. You can select any PFI pin as the source for
GPCTR0_SOURCE and configure the polarity selection for either rising
or falling edge.
As an output, the GPCTR0_SOURCE signal reflects the actual clock
connected to general-purpose counter 0. This is true even if another PFI
signal is receiving the source clock input. This output is set to
high-impedance at startup.
Figure 4-12 shows the timing requirements for the GPCTR0_SOURCE
signal.
Figure 4-12.
GPCTR0_SOURCE Signal Timing
The maximum allowed frequency is 20 MHz, with a minimum pulse width
of 23 ns high or low. There is no minimum frequency limitation.
The 20 MHz or 100 kHz timebase normally generates the
GPCTR0_SOURCE signal unless you select an external source.
GPCTR0_GATE Signal
Any PFI pin can receive as an input the GPCTR0_GATE signal, which is
available as an output on the PFI9/GPCTR0_GATE pin.
As an input, the GPCTR0_GATE signal is configured in the edge-detection
mode. You can select any PFI pin as the source for GPCTR0_GATE and
configure the polarity selection for either rising or falling edge. You can use
the GATE signal in a variety of different applications to perform actions
such as starting and stopping the counter, generating interrupts, saving the
counter contents, and so on.
t
p
t
w
t
w
t
p
t
w
= 50 ns minimum
= 23 ns minimum
