Chapter
2 Register
Map and Descriptions
©
National Instruments Corporation
2-23
Static DIO Register-Level Programmer Manual
RTSI Configuration Registers
RTSI Input Route
This register configures which RTSI lines are driven by inputs from the RTSI-enabled input
port.
Address Offset:
0x0C
Type:
Read-write
Size:
16-bit
Bit Map:
Bit
Name
Description
15–9
Reserved
Write only zeros to these bits.
8–0
RTSI IR(<8..0>)
If a bit is 1 in this register, it should not be 1 in
any other RTSI register. Write a 1 to a bit to
make that RTSI line drive the value of the
corresponding pin of the RTSI-enabled input
port. RTSI IR(8) corresponds to the PXI Star
Trigger line on PXI devices.
♦
For PCI—The RTSI-enabled port is the first input-enabled port.
♦
For PXI—The RTSI-enabled ports are the first two input-enabled ports.
15
14
13
12
11
10
9
8
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
RTSI IR(8)
7
6
5
4
3
2
1
0
RTSI IR(7)
RTSI IR(6)
RTSI IR(5)
RTSI IR(4)
RTSI IR(3)
RTSI IR(2)
RTSI IR(1)
RTSI IR(0)
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