Appendix B
Timing Diagrams
©
National Instruments Corporation
B-31
Figure B-37.
Digital Waveform Acquisition Timing Circuitry
Figure B-38 and Tables B-22 and B-23 describe the digital waveform
acquisition timing delays and requirements. Your inputs must meet the
requirements to ensure proper behavior.
Figure B-38.
Digital Waveform Acquisition Timing Delays
DI Waveform
Acquisition FIFO
PFI (Output)
DI Sample
Clock
Other Internal
Signals
PFI_i, RTSI_i,
or PXI_STAR_i
P0_i
P0
PFI, RTSI,
or PXI_STAR
PFI, RTSI,
or PXI_STAR
PFI_i, RTSI_i,
or PXI_STAR_i
DI Sample Clock
P0
P0_i
PFI (Output)
t
1
t
2
t
3
t
3
t
2
t
4
t
4
t
7
t
8
t
9
t
5
t
6
t
7
