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Appendix B

Timing Signal Information

NI PXI-4224 User Manual

B-10

ni.com

AI HOLD COMPLETE Signal

AI HOLD COMPLETE is an output-only signal that generates a pulse with
the leading edge occurring approximately 50 to 100 ns after an A/D
conversion begins. The polarity of this output is software configurable, but
the polarity is typically configured so that a low-to-high leading edge can
clock external analog input multiplexers that indicate when the input signal
has been sampled and can be removed. This signal has a 400 to 500 ns pulse
width and is software enabled. Figure B-12

shows the timing for

AI HOLD COMPLETE.

Note

The polarity of AI HOLD COMPLETE is not software selectable when

programmed using NI-DAQmx. It is a positive polarity pulse.

Figure B-12.

AI HOLD COMPLETE Signal Timing

t

w

= 400 to 500 n

s

t

d

= 50 to 100 n

s

AI CONV CLK

AI HOLD COMPLETE

t

d

t

w

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Summary of Contents for Isolated Analog Input Device NI PXI-4224

Page 1: ...PXI NI PXI 4224 User Manual NI PXI 4224 User Manual August 2008 373752G 01 ...

Page 2: ...anon 961 0 1 33 28 28 Malaysia 1800 887710 Mexico 01 800 010 0793 Netherlands 31 0 348 433 466 New Zealand 0800 553 322 Norway 47 0 66 90 76 60 Poland 48 22 3390150 Portugal 351 210 311 210 Russia 7 495 783 6851 Singapore 1800 226 5886 Slovenia 386 3 425 42 00 South Africa 27 0 11 805 8197 Spain 34 91 640 0085 Sweden 46 0 8 587 895 00 Switzerland 41 56 2005151 Taiwan 886 02 2377 2222 Thailand 662 ...

Page 3: ...y not be reproduced or transmitted in any form electronic or mechanical including photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation National Instruments respects the intellectual property of others and we ask our users to do the same NI software is protected by copyright and oth...

Page 4: ...ecautions to take When symbol is marked on a product it denotes a warning advising you to take precautions to avoid electrical shock When symbol is marked on a product it denotes a component that may be hot Touching this component may result in bodily injury bold Bold text denotes items that you must select or click in the software such as menu items and dialog box options Bold text also denotes p...

Page 5: ... Ground Referenced Signal Connection 2 12 Shielded Ground Referenced Signal Connection Recommended 2 12 Chapter 3 Configuring and Testing Verifying and Self Testing the Signals Using Test Panels 3 1 Configuring the NI PXI 4224 in MAX 3 2 Creating a Voltage Task or Global Channel Using NI DAQmx 3 2 Verifying and Self Testing an NI DAQmx Task or Global Channel 3 3 Chapter 4 Theory of Operation Theor...

Page 6: ...pleting the Application 5 5 Developing an Application Using LabVIEW 5 5 Using a DAQmx Channel Property Node in LabVIEW 5 7 Synchronization and Triggering 5 8 Synchronizing the NI PXI 4224 5 8 Synchronizing the NI PXI 4224 Using LabVIEW 5 10 Other Application Documentation and Material 5 11 Calibrating the NI PXI 4224 5 12 Loading Calibration Constants 5 12 Self Calibration 5 12 External Calibratio...

Page 7: ...Figure 4 1 Block Diagram of NI PXI 4224 4 2 Figure 4 2 Effect of Input Impedance on Signal Measurements 4 4 Figure 4 3 AI CONV CLK Signal Routing 4 6 Figure 4 4 NI PXI 4224 PXI Trigger Bus Signal Connection 4 8 Figure 5 1 Typical Program Flowchart 5 2 Figure 5 2 General Synchronizing Flowchart 5 9 Figure A 1 PXI 4224 Dimensions A 4 Figure B 1 Typical Posttriggered Sequence B 2 Figure B 2 Typical P...

Page 8: ...nal Pin Assignments 2 2 Table 4 1 Signal Conditioning Functional Blocks 4 3 Table 4 2 PXI Trigger Bus Timing Signals 4 9 Table 5 1 NI DAQmx Properties 5 4 Table 5 2 Programming a Task in LabVIEW 5 6 Table 5 3 Synchronizing the NI PXI 4224 Using LabVIEW 5 10 Table A 1 Maximum Sampling Rates A 1 ...

Page 9: ...he NI PXI 4224 has the following characteristics Each channel has a gain of either 1 or 10 An isolation rating of 42 4 Vpeak or 60 VDC Category I The front connector is a 25 pin D SUB connector with 16 pins for analog input Signal connections are made through a TB 2725 terminal block that provides connections for all eight analog input channels You can optionally connect a standard 25 pin D SUB ca...

Page 10: ...B female connector PXI or PXI SCXI combination chassis Software NI DAQ 7 3 1 or later One of the following LabVIEW Measurement Studio LabWindows CVI Documentation NI PXI 4224 User Manual Read Me First Safety and Radio Frequency Interference DAQ Getting Started Guide PXI or PXI SCXI combination chassis user manual Documentation for your software Tools 1 8 in flathead screwdriver You can download NI...

Page 11: ...the terminal block installation guides They explain how to physically connect the relevant pieces of the system Software documentation You may have both application software and NI DAQmx software documentation NI application software includes LabVIEW Measurement Studio and LabWindows CVI After you set up the hardware system use either your application software documentation or the NI DAQmx documen...

Page 12: ...de to unpack install and configure the NI PXI 4224 in a PXI chassis and then to the SCXI Quick Start Guide if you are using a PXI SCXI combination chassis LED Pattern Descriptions The following LEDs on the NI PXI 4224 front panel confirm the system is functioning properly The ACCESS LED is normally green and blinks yellow for a minimum of 100 ms during the NI PXI 4224 configuration The ACTIVE LED ...

Page 13: ...5 pin D SUB connector and one SMB connector You can program SMB connector as a PFI 0 line or for external calibration Table 2 1 shows the signal assignments of the D SUB connector for the NI PXI 4224 Figure 2 1 shows the front label with each set of screw terminals labeled according to the corresponding differential input signal for the NI PXI 4224 To connect a signal to the NI PXI 4224 use a TB 2...

Page 14: ...es that are safety rated for the voltage and category of the signals in your application Table 2 1 NI PXI 4224 25 Pin D SUB Terminal Pin Assignments Front Connector Diagram Pin Number Signal Names Pin Number Signal Names NC No Connection 14 AI 0 1 AI 0 15 AI 1 2 AI 1 16 AI 2 3 AI 2 17 AI 3 4 AI 3 18 AI 4 5 AI 4 19 AI 5 6 AI 5 20 AI 6 7 AI 6 21 AI 7 8 AI 7 22 No Pin 9 No Pin 23 NC 10 D GND 24 SPI C...

Page 15: ...ays to connect signals to the NI PXI 4224 and electrical diagrams showing the signal source and connections Whenever possible use shielded twisted pair field wiring and grounding to reduce the effects of unwanted noise sources 1 ACCESS and ACTIVE LEDs 2 SMB PFI 0 CAL Connector 3 25 Pin D SUB or TB 2725 Terminal Block Connector NI PXI 4224 8 Chan Isolation Amp ACCESS ACTIVE PFI 0 CAL 14 15 16 17 18...

Page 16: ... PXI 4224 through either an NI terminal block such as the TB 2725 or you can build a connector using a 25 pin D SUB Caution If you are building a 25 pin D SUB connector for your application make sure you use a connector and signal wires that are safety rated for the voltage and category of the signals in your application Figures 2 2 through 2 5 illustrate connecting signals using a D SUB connector...

Page 17: ...als National Instruments Corporation 2 5 NI PXI 4224 User Manual Figure2 3 UnshieldedGroundedSignalSourceConnectionUsingaD SUBConnector CH 0 CH 7 Twisted Pair Wiring VSIG VSIG Ground Reference Signal Source AI 0 AI 0 AI 7 AI 7 ...

Page 18: ... Connecting Signals NI PXI 4224 User Manual 2 6 ni com Figure 2 4 Shielded Floating Signal Source Connection Using a D SUB Connector AI 0 AI 0 CH 0 VSIG Signal Source AI 7 AI 7 CH 7 Shielding Twisted Pair Wiring ...

Page 19: ...onal Instruments Corporation 2 7 NI PXI 4224 User Manual Figure 2 5 Shielded Grounded Signal Source Connection Using a D SUB Connector CH 0 CH 7 Shielding Twisted Pair Wiring VSIG VSIG Ground Reference Signal Source AI 0 AI 0 AI 7 AI 7 ...

Page 20: ...l 2 8 ni com Figures 2 6 through 2 9 illustrate connecting signals using a terminal block Figure 2 6 Unshielded Floating Signal Source Connection Using a Terminal Block Twisted Pair Wiring AI 0 AI 0 CH 0 VSIG Signal Source Terminal Block AI 7 AI 7 CH 7 ...

Page 21: ...l Instruments Corporation 2 9 NI PXI 4224 User Manual Figure 2 7 Unshielded Grounded Signal Source Connection Using a Terminal Block Twisted Pair Wiring AI 0 AI 0 CH 0 AI 7 AI 7 CH 7 VSIG VSIG Ground Reference Signal Source Terminal Block ...

Page 22: ...ing Signals NI PXI 4224 User Manual 2 10 ni com Figure 2 8 Shielded Floating Signal Source Connection Using a Terminal Block Twisted Pair Wiring AI 0 AI 0 CH 0 VSIG Signal Source Terminal Block AI 7 AI 7 CH 7 Shielding ...

Page 23: ...onfiguration the signal source being measured is a floating signal source such as a battery A floating signal source is not connected in any way to the building ground system To connect a floating signal source connection to the NI PXI 4224 the signal VSIG is connected to the NI PXI 4224 channel AI X The signal reference VSIG is connected to the channel reference AI X Twisted Pair Wiring AI 0 AI 0...

Page 24: ... Ground Referenced Signal Connection Recommended Figures 2 5 and 2 9 illustrate shielded ground referenced signal connections The connection to this signal source is identical to the ground referenced signal connection with the addition of shielding around the field wiring The shielding is grounded at the signal source ground VSIG Ground Reference Connect the signal VSIG to the NI PXI 4224 channel...

Page 25: ...ice is measuring signals properly The test panels allow you to measure the signal connected to the NI PXI 4224 directly as well as configure some of the properties of your measurement To open the NI PXI 4224 device test panels when in MAX complete the following steps 1 Expand Devices and Interfaces to display the list of devices and interfaces 2 Expand NI DAQmx Devices to display the list of NI DA...

Page 26: ...tage 5 If you are creating a channel you can select only one channel If you are creating a task select the channels to add to the task You can select a range of channels by holding down the Shift key while selecting the channels You can select multiple individual channels by holding down the Ctrl key while selecting channels Click Next 6 Enter the name of the task or channel and click Finish 7 Sel...

Page 27: ... DAQmx Global Channel verify the NI DAQmx Task or NI DAQmx Global Channel signal and functionality using the Test button in the toolbar 1 If you created an NI DAQmx Task set the timing and triggering settings you wish to use in the test in the Task Timing and Task Triggering tabs 2 Click the Test button to open the test panel and take a measurement You have now verified the NI PXI 4224 configurati...

Page 28: ...ory of Operation This chapter describes the theory of operation measurement considerations and timing information Theory of Operation Figure 4 1 illustrates the key functional components of the NI PXI 4224 including the DAQ and integrated signal conditioning circuitry ...

Page 29: ... ISO Amp Opto Isolation Opto Isolation Opto Isolation Opto Isolation Opto Isolation Opto Isolation Opto Isolation Opto Isolation Trigger Interface Analog Input Timing Control DMA Interrupt Request Bus Interface DAQ STC Digital I O RTSI Bus Interface AI Control IRQ DMA Analog Input Control EEPROM Control DMA Interface Plug and Play DAQ APE Bus Interface 82C55 DIO Control DAQ STC Bus Interface EEPRO...

Page 30: ...uit under test you can correct for the attenuation caused by the NI PXI 4224 in software Since RIN is relatively large 1 GΩ it requires a large source impedance RS to cause a significant change in the measured voltage VMEAS In general a source impedance of less than 200 kΩ does not interfere with the accuracy of the measurement For example a 200 kΩ source impedance results in a 0 02 gain error Tab...

Page 31: ...nals is referred to as the common mode rejection ratio CMRR The CMMR is usually stated in decibels at a given frequency or over a given frequency band of interest Common mode signals can arise from a variety of sources and can be induced through conductive or radiated means One of the most common sources of common mode interference is 50 or 60 Hz powerline noise The minimum NI PXI 4224 CMRR is 140...

Page 32: ...16 bit counters and a maximum timing resolution of 50 ns The DAQ STC makes possible applications such as equivalent time sampling and seamless changing of the sampling rate The NI PXI 4224 uses the PXI trigger bus to easily synchronize several measurement functions to a common trigger or timing event The PXI trigger bus is connected through the rear signal connector to the PXI chassis backplane Th...

Page 33: ...connected to the front SMB connector of the NI PXI 4224 Software can select PFI 0 as the external source for a given timing signal Any timing signal can use the PFI 0 pin as an input and multiple timing signals can simultaneously use the same PFI This flexible routing scheme reduces the need to change physical connections to the I O connector for different applications Refer to Table 4 2 for infor...

Page 34: ... to drive its internal timebase over the PXI trigger bus to another device programmed to receive this timebase signal This clock source whether local or from the PXI trigger bus is used directly by the device as the primary frequency source The default configuration is to use the internal timebase without driving the PXI trigger bus timebase signal The NI PXI 4224 can use the PXI_Trig 7 line to sy...

Page 35: ...hows this signal connection scheme Figure 4 4 NI PXI 4224 PXI Trigger Bus Signal Connection PXI Bus Connector Switch RTSI Switch PXI Trigger 7 PXI Trigger 0 5 DAQ STC AI START TRIG AI REF TRIG AI CONV CLK AI SAMP CLK AI PAUSE TRIG AI SAMPLE CLK TIMEBASE Master Timebase PXI Star ...

Page 36: ...ty on PXI Trigger Bus AI START TRIG Input Output This trigger is the source for the analog input digital start trigger which is the trigger that begins an acquisition This trigger sends out the actual analog input start trigger Input Output Input Output AI PAUSE TRIG Input This signal can pause and resume acquisition Input Input AI SAMPLE CLK TIMEBASE Input This timebase provides the master clock ...

Page 37: ...n describes the software and programming steps necessary to use the NI PXI 4224 For more information about a particular software or programming process refer to your ADE documentation Typical Program Flow Chart Figure 5 1 shows a typical program flow chart for creating an AI voltage channel taking a measurement and clearing the data Note For more information about creating tasks and channels in MA...

Page 38: ...ent Adjust Timing Settings Stop Measurement Create Task Using DAQ Assistant Yes Yes Yes Yes Yes Yes Create Task in DAQ Assistant or MAX Further Configure Channels Start Measurement Create a Task Programmatically Create AI Voltage Channel Hardware Timing Triggering Analyze Data Display Data Process Data Graphical Display Tools Continue Sampling Clear Task ...

Page 39: ... you are using an ADE other than an NI ADE or if you want to explicitly create and configure a task for a certain type of acquisition you can programmatically create the task from your ADE using function or VI calls If you create a task using the DAQ Assistant you can still further configure the individual properties of the task programmatically using function calls or property nodes in your ADE N...

Page 40: ...configure the device for your application If you created the task and channels using the DAQ Assistant you can still modify the channel properties programmatically For a complete list of NI DAQmx properties refer to your ADE help file Note Table 5 1 is a representative sample of important properties you can adjust in analog input measurements with the NI PXI 4224 It is not a complete list of NI DA...

Page 41: ... graphical display such as charts graphs slide rules and gauge indicators NI ADEs have tools that allow you to save the data to files such as spreadsheets for easy viewing ASCII files for universality or binary files for smaller file sizes Completing the Application After you have completed the measurement analysis and presentation of the data it is important to stop and clear the task This releas...

Page 42: ...d and configured your task and channels using the DAQ Assistant Adjust Timing Settings optional DAQmx Timing vi Sample Clock by default This VI is optional if you created and configured your task using the DAQ Assistant Configure Channels optional DAQmx Channel Property Node Refer to the Using a DAQmx Channel Property Node in LabVIEW section for more information This step is optional if you create...

Page 43: ...ropriate channel to each list of properties Note If you do not use Active Channels the properties will be set on all of the channels in the task 6 Right click ActiveChan and select Add Element Left click the new ActiveChan Navigate through the menus and select the property you wish to define 7 You must change the property to read or write to either get the property or write a new value Right click...

Page 44: ...XI 4224 devices to start an acquisition simultaneously they all must reference a common start trigger To prevent drift over the course of the acquisition they must share a common timebase or sample clock The NI PXI 4224 that generates the start trigger and the timebase for all of the synchronized devices is called the master The master NI PXI 4224 exports the shared timing signals through the PXI ...

Page 45: ...ptional Create Master AI Voltage Channels Configure Master Channel Get Master Timebase Source and Rate from Master Task Create a Slave Task optional Create Slave AI Voltage Channels Configure Slave Channel More Slave Tasks Configure Slave Timing Set Slave to Use Timebase from Master Configure Slave Triggering Start Slave Measurement s Start Master Measurement Continue Sampling Clear Master Task Cl...

Page 46: ... make to the task will not be saved to a task in MAX Create Master AI Voltage Channels DAQmx Create Virtual Channel vi AI Voltage by default Configure Master Channels Use a DAQmx Channel Property Node Refer to the Using a DAQmx Channel Property Node in LabVIEW section for more information Configure Master Timing DAQmx Timing vi Sample Clock by default Get Master Timebase Source and Rate from Maste...

Page 47: ...ster Use a DAQmx Timing Property Node to set MasterTimebase Src and MasterTimebase Rate to the values retrieved from the master task in the Get Master Timebase Source and Rate from Master Task step Configure Slave Triggering DAQmx Trigger vi Start Digital Edge use MasterDevice ai StartTrigger as the source substituting the master device identifier for MasterDevice Start Slave Measurement s DAQmx S...

Page 48: ... associated calibration constants are stored in the onboard nonvolatile flash memory These constants are the values that were written to the CalDACs to achieve calibration in the factory and the remaining signal conditioning error The digitizer calibration constants are automatically read from the flash memory and loaded into the CalDACs by the NI PXI 4224 hardware the next time the device driver ...

Page 49: ...abVIEW The results of an internal calibration are stored in the NI PXI 4224 flash memory so that the CalDACs are automatically loaded with the newly calculated calibration constants the next time the NI PXI 4224 is powered on Performing a self calibration at the operating temperature of your application will ensure the NI PXI 4224 meets the specifications in Appendix A Specifications External Cali...

Page 50: ...tage Protection Powered on or off 42 4 Vpeak or 60 VDC max PFI 0 CAL SMB connector 15 V powered on or off Analog Input Number of input channels 8 Input range 10 VDC Resolution 16 bits Maximum sampling rate 200 kS s aggregate multichannel Table A 1 Maximum Sampling Rates Number of Channels Sample Rate 1 333 kS s 2 100 0 kS s ch 3 66 6 kS s ch 4 50 0 kS s ch 5 40 0 kS s ch 6 33 3 kS s ch 7 28 5 kS s...

Page 51: ...sfer Characteristics Nonlinearity 0 02 FSR DNL 0 5 LSB typ 1 LSB max No missing codes 16 bits guaranteed Nominal Range V of Reading 1 Year Offset μV Noise Quantization μV Temperature Drift Absolute Accuracy at Full Scale mV Single Pt Averaged Gain C Offset μV C 10 V 0 11 1730 6317 200 0 0025 230 12 6 1 V 0 12 176 632 20 0 0 0025 26 1 4 Note Accuracies are valid for measurements following an intern...

Page 52: ...ignal conditioning component only 600 ppm typ 1 000 ppm max at a gain of 1 Memory FIFO buffer size 512 samples Data transfers DMA interrupts programmed I O DMA modes Scatter gather single transfer demand transfer Configuration memory size 512 words Digital Triggers Number of triggers 2 Purpose Start and stop trigger gate clock Source PFI 0 AI START TRIG front SMB connector PXI_TRIG 0 5 to PXI_Star...

Page 53: ...edance 10 kΩ Coupling DC PXI Trigger Bus Trigger lines 6 Star trigger 1 PCI Bus Interface Master slave Power Requirements 2 A at 5 VDC 5 Physical Figure A 1 PXI 4224 Dimensions NI PXI 4224 8 Chan Isolation Amp ACCESS ACTIVE PFI 0 CAL 14 15 16 17 18 19 20 21 22 23 24 25 1 2 3 4 5 6 7 8 9 10 11 12 13 2 0 cm 0 79 in 13 0 cm 5 12 in 21 3 cm 8 39 in ...

Page 54: ... is rated for Measurement Category I and is intended to carry signal voltages no greater than 42 4Vpeak or 60 VDC Do not use this device for connection to signals or for measurements within Categories II III or IV Isolation Voltages Channel to channel channel to earth isolation Continuous 60 VDC Measurement Category I Withstand 850 Vrms verified by a 5 s dielectric withstand type test Channel to b...

Page 55: ... 1 Class A emissions FCC 47 CFR Part 15B Class A emissions ICES 001 Class A emissions Note For the standards applied to assess the EMC of this product refer to the Online Product Certification section Note For EMC compliance operate this product according to the documentation Note For EMC compliance operate this device with shielded cables CE Compliance This product meets the essential requirement...

Page 56: ...t This page contains the environmental regulations and directives with which NI complies as well as other environmental information not included in this document Waste Electrical and Electronic Equipment WEEE EU Customers At the end of the life cycle all products must be sent to a WEEE recycling center For more information about WEEE recycling centers and National Instruments WEEE initiatives visi...

Page 57: ...eme reduces the need to change the physical wiring to the device I O connector for applications requiring alternative wiring As an input each PFI signal can be individually configured for edge or level detection and polarity selection You can use the polarity selection for any timing signal but the edge or level detection depends on the particular timing signal being controlled The detection requi...

Page 58: ... a trigger event is received Figure B 1 shows a typical posttriggered sequence Figure B 1 Typical Posttriggered Sequence Pretriggered DAQ allows you to view data that is acquired before the trigger of interest in addition to data acquired after the trigger Figure B 2 shows a typical pretriggered sequence Figure B 2 Typical Pretriggered Sequence 1 3 0 4 2 AI START TRIG AI SAMP CLK AI CONV CLK Scan ...

Page 59: ...nce for both posttriggered and pretriggered acquisitions Refer to Figures B 1 and B 2 for the relationship of AI START TRIG to the sequence As an output AI START TRIG reflects the action that initiates a sequence even if the acquisition is externally triggered by another PFI The output is an active high pulse with a pulse width of 50 to 100 ns This output is set to high impedance at startup Figure...

Page 60: ...TART TRIG signal initiates the acquisition The scan counter SC indicates the minimum number of scans before AI REF TRIG is recognized After the SC decrements to zero it is loaded with the number of posttrigger scans to acquire while the acquisition continues The device ignores AI REF TRIG if it is asserted prior to the SC decrementing to zero After the selected edge of AI REF TRIG is received the ...

Page 61: ... selected edge of AI SAMP CLK initiates a scan The SI2 counter starts if you select an internally triggered AI CONV CLK As an output AI SAMP CLK reflects the actual start pulse that initiates a scan even if the starts are externally triggered by another PFI or PXI_Trig 0 5 Two output options are available The first option is an active high pulse with a pulse width of 50 to 100 ns which indicates t...

Page 62: ...pulses are masked off until the device generates AI SAMP CLK If you use internally generated conversions the first AI CONV CLK appears when the onboard SI2 counter reaches zero If you select an external AI CONV CLK the first external pulse after Rising Edge Polarity Falling Edge Polarity tw 10 ns minimum tw b Scan in Progress Two Conversions per Scan Start Pulse AI CONV REF AI SAMP CLK toff 10 ns ...

Page 63: ...I_Trig 0 5 or PXI_Star can externally input the AI CONV CLK signal which is also available as an output on PXI_Trig 0 5 or PXI_Star Refer to Figures B 1 and B 2 for the relationship of AI CONV CLK to the sequence As an input AI CONV CLK is configured in edge detection mode You can configure the polarity selection for either rising or falling edge The selected edge of AI CONV CLK initiates an A D c...

Page 64: ...uence Scans occurring within a sequence can be gated by either the hardware AI PAUSE TRIG signal or the software command register gate AI PAUSE TRIG Signal PFI 0 PXI_Trig 0 5 or PXI_Star can externally input the AI PAUSE TRIG signal which is not available as an output on the I O connector AI PAUSE TRIG can mask off scans in a sequence You can configure the pin you select as the source for AI PAUSE...

Page 65: ...P CLK signal Configure the pin you select as the source for AI SAMPLE CLK TIMEBASE in level detection mode Configure the polarity selection for the pin for either active high or active low The maximum allowed frequency is 20 MHz with a minimum pulse width of 23 ns high or low There is no minimum frequency Either the 20 MHz or 100 kHz internal timebase generates AI SAMPLE CLK TIMEBASE unless you se...

Page 66: ...ypically configured so that a low to high leading edge can clock external analog input multiplexers that indicate when the input signal has been sampled and can be removed This signal has a 400 to 500 ns pulse width and is software enabled Figure B 12 shows the timing for AI HOLD COMPLETE Note The polarity of AI HOLD COMPLETE is not software selectable when programmed using NI DAQmx It is a positi...

Page 67: ...r PXI SCXI chassis complete the following steps while referring to Figure C 1 1 Power off the PXI chassis Do not remove the NI PXI 4224 device from a chassis that is powered on If the you are using a PXI SCXI combination chassis also power off the SCXI portion of the chassis 2 Rotate the mounting screws that secure the NI PXI 4224 to the chassis counter clockwise until they are loose but do not co...

Page 68: ...xpand Devices and Interfaces to display the list of installed devices and interfaces The NI PXI 4224 should have a red circle with a white X inside it next to the device to indicate it has been physically removed from the chassis 2 Right click the NI PXI 4224 and click Delete 3 You are presented with a confirmation window Click Yes to continue deleting the device or No to cancel this action The NI...

Page 69: ... operating system Does the NI PXI 4224 have hardware analog triggering No Is the NI PXI 4224 an isolated device Yes the NI PXI 4224 provides true channel to channel and channel to chassis isolation When no signal is connected to the NI PXI 4224 what behavior should I expect While the NI PXI 4224 may react differently because of system and condition variables in most cases a channel drifts to one e...

Page 70: ... perform an external calibration of the NI PXI 4224 As of the NI PXI 4224 release an external calibration document is not available To check the availability of an NI PXI 4224 external calibration document is go to ni com calibration and click Manual Calibration Procedures ...

Page 71: ...ual Glossary Symbol Prefix Value p pico 10 12 n nano 10 9 μ micro 10 6 m milli 10 3 k kilo 103 M mega 106 G giga 109 T tera 1012 Symbols Per Degree Percent Positive of or plus Negative of or minus Ω Ohm A A Amperes A D Analog to digital AC Alternating current ...

Page 72: ...mple 5 to 5 V breakdown voltage The voltage high enough to cause breakdown of optical isolation semiconductors or dielectric materials See also working voltage bus The group of conductors that interconnect individual circuitry in a computer Typically a bus is the expansion vehicle to which I O or other devices are connected An example of a PC bus is the PCI bus C C Celsius CalDAC Calibration DAC C...

Page 73: ...ing and measuring electrical signals from sensors transducers and test probes or fixtures and inputting them to a computer for processing 2 collecting and measuring the same kinds of electrical signals with A D and or DIO devices plugged into a computer and possibly generating control signals with D A and or DIO devices in the same computer DAQ Assistant A configuration assistant with which you de...

Page 74: ...hat can be erased with an electrical signal and reprogrammed EMC Electromagnetic compatibility EMI Electromagnetic interference Defines unwanted electromagnetic radiation from a device which could interfere with desired signals in test or communication equipment ESD Electrostatic discharge F FIFO First in first out memory buffer floating signal sources Signal sources with voltage signals that are ...

Page 75: ...input terminals of a circuit input offset current The difference in the input bias currents of the two inputs of an instrumentation amplifier instrumentation amplifier A circuit whose output voltage with respect to ground is proportional to the difference between the voltages at its two high impedance inputs interchannel delay Amount of time that passes between sampling consecutive channels The in...

Page 76: ...d channels maximum working voltage The highest voltage with respect to ground that should be applied to an input terminal during normal use normally well under the breakdown voltage for safety margin Includes both the signal and common mode voltages MITE MXI Interface to Everything A custom ASIC designed by NI that implements the PCI bus interface The MITE supports bus mastering for high speed dat...

Page 77: ...e between two conductors of a circuit O OUT Output pin A counter output pin where the counter can generate various TTL pulse waveforms P PCI Peripheral component interconnect PFI Programmable function input PGA Programmable gain amplifier port 1 A communications connection on a computer or a remote controller 2 a digital port consisting of four or eight lines of digital input and or output ppm Par...

Page 78: ...system integration bus The NI timing bus that connects DAQ devices directly for precise synchronization of functions S s Second or seconds S Sample or samples S s Samples per second Used to express the rate at which a DAQ device samples an analog signal sample counter The clock that counts the output of the channel clock in other words the number of samples taken scan One or more analog or digital...

Page 79: ...ation of signals to prepare them for digitizing software trigger A programmed event that triggers an event such as DAQ STC System timing controller T TRIG Trigger signal trigger Any event that causes or starts some form of data capture TTL Transistor transistor logic A digital circuit composed of bipolar transistors wired in a certain manner V V Volt or volts VDC Volts direct current VI Virtual in...

Page 80: ... readings taken at a specific sampling rate working voltage The highest voltage with respect to ground that should be applied to an input terminal during normal use normally well under the breakdown voltage for safety margin Includes both the signal and common mode voltages ...

Page 81: ... input signal timing figure B 3 output signal timing figure B 3 overview B 3 AI AutoZeroMode property table 5 4 AI Coupling property table 5 4 analog input connections 2 3 ground referenced signal connection recommended figure 2 12 shielded 2 12 specifications A 1 application development acquiring data 5 5 adjusting timing and triggering 5 3 analyzing data 5 5 clearing tasks and memory 5 5 configu...

Page 82: ...igure B 10 AI PAUSE TRIG signal description table 4 9 overview B 8 AI REF TRIG signal input signal timing figure B 4 output signal timing figure B 5 overview B 4 AI SAMP CLK signal input signal timing figure B 6 output signal timing figure B 6 overview B 5 AI SAMPLE CLK TIMEBASE signal description table 4 9 overview B 9 signal timing figure B 9 AI START TRIG signal description table 4 9 input sign...

Page 83: ...ng multiple devices 5 8 LED pattern descriptions 1 4 M MAX See Measurement Automation Explorer MAX maximum working voltage specifications A 5 Measurement Automation Explorer MAX configuring NI PXI 4224 3 1 creating voltage task or global channel 3 2 removing NI PXI 4224 C 2 verifying installation 3 1 NI DAQmx Task or Global Channel 3 3 signal connections 3 1 measurement considerations common mode ...

Page 84: ... PXI Star Trigger controller 4 7 PXI trigger bus overview 4 5 signal connection figure 4 8 specifications A 4 timebase signal 4 7 timing signals table 4 9 Q questions and answers D 1 R regulatory compliance specifications A 6 removing NI PXI 4224 from Measurement Automation Explorer MAX C 2 from PXI chassis C 1 S safety specifications A 6 self calibration 5 12 self test verification measuring sign...

Page 85: ...ee also NI PXI 4224 block diagram of NI PXI 4224 4 2 timing and control overview 4 5 timing and triggering in application development 5 3 timing connections DAQ timing connections typical posttriggered acquisition figure B 2 typical pretriggered acquisition figure B 2 overview B 1 programmable function input connections B 1 timing signal routing device and PXI clocks 4 7 programmable function inpu...

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