Chapter 3
Hardware Overview
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National Instruments Corporation
3-5
•
External Lock Mode
—In external lock mode, the IMAQ 1410
receives HSYNC, VSYNC, and PCLK signals from the camera and
uses these signals to acquire the video signals directly. You can use this
mode to acquire from a line scan camera.
•
External HSYNC/VSYNC (HLOCK only) Mode
—In external
HSYNC/VSYNC (HLOCK only) mode, the IMAQ 1410 receives the
external HSYNC and VSYNC signals and internally generates the
PCLK signal. In this mode, the IMAQ 1410 genlock circuitry uses only
the HSYNC signal for locking. You can use this mode to acquire from
asynchronously reset cameras that output a continuous HSYNC.
Analog Front End Considerations
The analog front end of the IMAQ 1410 features a calibrated gain circuit,
programmable DC-restore circuit, and 10-bit ADC as shown in Figure 3-2.
Figure 3-2.
IMAQ 1410 Analog Front End
10-Bit/8-Bit Mode
The IMAQ 1410 always digitizes the incoming video signal to 10 bits of
resolution. In 10-bit mode, the IMAQ 1410 has four fixed, full-scale ranges
for calibrating the gain for each range. Because the nominal full-scale
ranges are 0.20, 0.35, 0.70, and 1.40 V, the gain is not continuously variable
in this mode. To maintain compatibility with existing acquisition code
and processing algorithms used with other IMAQ analog devices, the
IMAQ 1410 has an 8-bit mode that converts the 10-bit data from the ADC
to 8-bit data in the LUT after gain correction and any digital filtering has
occurred.
DC-restore
1 of 4
Gain
Analog
Video
10-bit
ADC
Digital Gain
Correction,
Filtering, and LUT
10- or 8-bit
