Function Description
Section Three
GPIB-LPT User Manual
3-2
© National Instruments Corporation
The interface consists of the following functional components:
•
Address Decoding
•
Configuration Jumpers
•
Data and Control Latches
•
Data Transceivers
•
Data Wrap, Control Wrap and Status Buffers
•
External Device Listen Address Switch
•
GPIB Handshaking
•
GPIB Addressing
Address Decoding
Address decoding monitors the PC address bus to recognize when a GPIB-LPT address is present
and sends a read and/or write to the GPIB-LPT registers.
Configuration Jumpers
The configuration jumpers determine the base I/O address and the corresponding interrupt request
line of the GPIB-LPT.
Data and Control Latches
Data and control latches emulate the data and control registers of the standard IBM PC parallel port
adapter. Writing to these latches controls output to the printer/plotter.
Data Transceivers
Data transceivers interface the GPIB-LPT local data bus to the IBM PC data bus.
Data Wrap, Control Wrap and Status Buffers
Data wrap, control wrap and status buffers, and the data and control latches make the GPIB-LPT
compatible with the standard PC parallel port software. When the data and control wrap buffers
are read by software, the data previously written to the data and control latches is returned; the
status buffers emulate the PC parallel port read-only status register.
External Device Listen Address Switch
The external device listen address switch sets the listen address of the GPIB external device(s)
attached to the GPIB-LPT. This listen address is sent to address the external device to listen.
