Chapter 4
General-Purpose Counter/Timer
DAQ-STC Technical Reference Manual
4-14
©
National Instruments Corporation
4.4.4.3 Buffered Pulse-Train Generation
This function is similar to buffered static pulse-train generation except that the software
changes the pulse parameters after the generation of each pulse. The G_GATE active edge
causes the counter to generate a sequence of pulses with programmable delay from trigger,
pulse interval, and pulsewidth. The counter uses G_SOURCE as a timebase to generate the
pulses, so you specify the programmable parameters in terms of periods of the G_SOURCE
input. After each pulse, an interrupt notifies the CPU so that the interrupt software can load
the parameters for the next pulse into the counter registers. Dual-load registers provide
additional software programming flexibility. Figure 4-18 shows the generation of three
pulses. The first pulse has a delay from trigger of three and a pulsewidth of three. The second
pulse has a pulse interval of four and a pulsewidth of two. The third pulse has a pulse interval
of three and a pulsewidth of four.
Figure 4-18.
Buffered Pulse-Train Generation
4.4.4.4 Frequency Shift Keying (FSK)
FSK is similar to pulse-train generation in that the counter generates a train of pulses.
However, in FSK mode the G_GATE signal modulates the frequency and duty cycle of the
output train. The GPCT module implements frequency modulation by allowing the G_GATE
signal to select the load registers. Figure 4-19 shows an example of FSK. When G_GATE is
low, the counter generates a low-frequency signal with a long pulsewidth. When G_GATE is
high, the counter generates a high-frequency signal with a short pulsewidth.
G_SOURCE
G_GATE
G_OUT
Counter Value
Counter TC
2 1
0
1
2
2
2
2
1
2
1
0
3
2
1
0
1
0
0
3
0
