Chapter 4
Theory of Operation
©
National Instruments Corporation
4-3
•
DIO circuitry
•
TIO circuitry
DAQ functions can be executed by using the AI circuitry and some of
the TIO circuitry. The internal data and control buses interconnect the
components. The theory of operation for each of these components is
explained in the remainder of this chapter. The theory of operation for
the DAQ circuitry is included with the discussion of the AI circuitry.
PCMCIA I/O Channel Interface Circuitry
The PCMCIA I/O channel interface circuitry consists of an address bus,
a data bus, interrupt lines, and several control and support signals. The
components making up the DAQCard-700 PCMCIA I/O channel interface
circuitry are shown in Figure 4-2.
Figure 4-2.
PCMCIA I/O Interface Circuitry Block Diagram
PCMCIA
I/O
Channel
Address Bus
Control Lines
Data Bus
IRQ
Timing
Interface
Data
Buffers
Interrupt
Control
Address
Decoder
Card
Information
Structure
Register Selects
Read and Write Signals
Internal Data Bus
Interrupt Requests
PCMCIA
Control
Registers