Chapter 3- BIOS Setup
Multi-Tech Systems, Inc. Single Board Computer IAC-F696 User’s Guide (S000349A)
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Chipset Features Setup
When you select the CHIPSET FEATURES SETUP on the main program, the screen display will
appears as:
Chipset Features Setup Screen
Phoenix - Award BIOS CMOS Setup Utility
Advanced Chipset Features
Item Help
Menu Level
f
DRAM Clock
DRAM Timing By SPD
SDRAM Cycle Length
Bank Interleave
Memory Hole
P2C/C2P Concurrency
Fast R-W Turn Around
System BIOS Cacheable
Video RAM Cacheable
Frame Butter Size
AGP Aperture Size
CPU to PCI Write Buffer
PCI Dynamic Bursting
PCI Master 0 WS Write
PCI Delay Transaction
PCI#2 Access #1 Retry
AGP Master 1 WS Write
AGP Master 1 WS Read
Select Display Device
Panel Type
[By Auto]
[Enabled]
3
Disabled
[Disabled]
[Enabled]
[Enabled]
[Enabled]
[Enabled]
[8M]
[64M]
[Enabled]
[Enabled]
[Enabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[CRT]
[1024
¯
768]
Ç
È
Æ
³
Move
Enter: Select
+/-/PU/PD: Value
F10: Save Esc: Exit
F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
The following explains the options for each of the features as listed in the above menu:
DRAM Clock: Set the clock frequency of the DRAMs. The default is HOST CLOCK. You can select
HCLK+33M if your DRAM modules are faster than CPU (eg. a 66Mhz FSB CPU with a PC100 SDRAM or a
100Mhz FSB CPU with PC-133 SDRAM) or select HCLK-33M for a faster CPU with slower SDRAMs. This
selection is indeed important if you're thinking of overclocking a Pentium III to run beyond 133Mhz but only
have PC-100 SDRAM
DRAM Timing By SPD: This item allows you to select the value in this field, depending on whether the
board has paged DRAMs or EDO (extended data output) DRAMs.
SDRAM Cycle Length: This item allows you to select the SDRAM cycle length. The settings are 2 or 3.
Bank Interleave: Select the bank interleave. The default setting is Disabled.
Memory Hole: In order to improve performance, certain space in memory can be reserved for ISA cards.
This memory must be mapped into the memory space below 16MB.
P2C / C2P Concurrency: This item allows you to Enable or Disable the PCI to CPU, CPU to PCI
concurrency. The default setting is Enabled
.
