3-10
BIOS Setup
MS-S0221
BIOS Setup
MS-S0221
Active Processor Cores
This setting specifies the number of active processor cores.
Limit CPUID Maximum
Ths feature allows you to crcumvent problems wth older operatng systems
that do not support the Intel Pentum 4 processor wth Hyper-Threadng Tech-
nology. When enabled, the processor wll lmt the maxmum CPUID nput
value to 03h when quered, even f the processor supports a hgher CPUID
nput value. When dsabled, the processor wll return the actual maxmum
CPUID nput value of the processor when quered.
Execute Disable Bit
Intel’s Execute Dsable Bt functonalty can prevent certan classes of mal-
cious “buffer overflow” attacks when combined with a supporting operating
system. Ths functonalty allows the processor to classfy areas n memory by
where applcaton code can execute and where t cannot. When a malcous
worm attempts to nsert code n the buffer, the processor dsables code execu-
ton, preventng damage or worm propagaton.
Hardware Prefetcher
The processor has a hardware prefetcher that automatcally analyzes ts re-
qurements and prefetches data and nstructons from the memory nto the
Level 2 cache that are lkely to be requred n the near future. Ths reduces
the latency assocated wth memory reads. When enabled, the processor’s
hardware prefetcher wll be enabled and allowed to automatcally prefetch
data and code for the processor. When dsabled, the processor’s hardware
prefetcher wll be dsabled.
Adjacent Cache Line Prefetch
The processor has a hardware adjacent cache lne prefetch mechansm that
automatcally fetches an extra 64-byte cache lne whenever the processor
requests for a 64-byte cache lne. Ths reduces cache latency by makng
the next cache lne mmedately avalable f the processor requres t as well.
When enabled, the processor wll retreve the currently requested cache lne,
as well as the subsequent cache lne. When dsabled, the processor wll only
retreve the currently requested cache lne.
DCU Streamer Prefetcher
Ths settng enables/dsables the functon of Data Cache Unt (DCU) Streamer
prefetcher. If ths settng s set to [Enabled], when the DCU Streamer prefetcher
detects multple loads from the same lne done wthn a tme lmt, t prefetches
the next lne nto the L1 data cache.
DCU IP Prefetcher
The Data Cache Unt (DCU) IP prefetcher scrutnzes hstorcal readng n
order to have an overall dagram and loads foreseeable data n L1 cache.
Intel Virtualization Technology
Vrtualzaton enhanced by Intel Vrtualzaton Technology wll allow a platform
to run multple operatng systems and applcatons n ndependent parttons.
Wth vrtualzaton, one computer system can functon as multple “vrtual” sys-
tems.
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Summary of Contents for MS-S0221
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