Chapter 2
2-8
TV5200-VTDF128
Layout
nVIDIA GeForce FX GPU
128MB DDR RAM
AGP Interface
Flash BIOS
Decoder
Fan Connector
D-Sub Port (DB 15-Pin)
DVI Connector
TV-Out / Video_In
Connector (S&C)
FM Radio Antenna Connector
CATV In Connector
Audio Line In / Out Connector
TV and FM Silicon Tuner
VGA Features
CineFX Shading Architecture
Support for DX 9.0 Pixel/Vertex Shader 2.0+
Very long pixel programs up to 1024 instructions
Very long vertex programs with up to 256 static instructions and up to
65536 instructions executed before termination
Looping and subroutines with up to 256 loops per vertex program
Subroutines in shader programs
Dynamic flow control
Conditional write masking
Conditional execution
Procedural shading
Full instruction set for vertex and pixel programs
Z-correct bump-mapping
Hardware-accelerated shadow effects with shadow buffers
Two-sided stencil
