MSI CRYSTAL A410 - Crystal - A410, User Manual

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BIOS Setup
PCI/VGA Palette Snoop
W hen set to Enabled , multiple VGA devices operating on different buses can handle
data from the CPU on each set of palette registers on every video device. Bit 5 of the
command register in the PCI device configuration space is the VGA Palette Snoop bit
(0 is disabled). For example, if there are two VGA devices in the computer (one PCI
and one ISA) and the:
The setting must be set to Enabled if any ISA bus adapter in the system requires VGA
palette snooping.
M aximum Payload Size
This setting specifies the maximum TLP payload size for the PCI Express devices.
The unit is byte.
PNP/PCI Configurations
VGA Palette Snoop
Bit Setting
Action
D is abled Data read or written by the CPU is only directed to the PCI
VGA device
’
s palette registers.
Enabled Data read or written by the CPU is directed to both the PCI
VGA device
’
s palette registers and the ISA VGA device
’
s
palette registers, permitting the palette registers of both
VGA devices to be identical.
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