June 1999
68P02945C75-A
2-5
GTX/GTX LTR/LTS 2000 Portable Radios Service Manual
Controller
of reference divider input from the 16.8 MHz tempera-
ture-compensated reference oscillator. If the two fre-
quencies differ, the synthesizer generates a control
(error) voltage causing the VCO to change frequency.
Modulation of the carrier is achieved by using a 2-port
modulation technique. The deviation of the low fre-
quency tone, such as PL/DPL, is achieved by injecting
the signal into an analog/digital circuit in the synthe-
sizer. The resulting digitized signal is then modulated
by the fractional N divider; this generates the required
deviation. The deviation of the high frequency tone is
achieved by modulating the modulation varactor on
the VCO. In order to cover a very wide bandwidth, the
VCO control voltage is stepped up by using a positive
multiplier circuit. A 13-V supply powers the phase
detector circuitry. The VCO signal is ampliÞed by the
integrated buffer ampliÞer of the VCO buffer. The
buffer IC Tx output signal is Þltered and channeled to
the RF PA (U101). The buffer IC Rx output signal is
connected to the Rx injection buffer. The output signal
of that buffer is supplied to the receiver Þrst mixer
(U50) as the injection signal.
Controller
The GTX/GTX LTR/LTS 2000 controller is an open
architecture which consists of:
¥ U709, Motorola 68HC11K1 microprocessor
¥ U701, Audio Signalling Filter Integrated Circuit,
ASFIC
¥ U703, EEPROM (4 Kbyte for GTX, 4 Kbyte or 8
Kbyte for LTS 2000)
¥ U705, 128/256 Kbyte OTP/FLASH ROM
¥ U706, 8/32 Kbyte Static RAM
¥ U707, LCD Display Driver
¥ U704, 5 V Voltage Regulator
U709, U703, U705, U706 and U707 are powered by
U704. U701 is powered from a 5V Regulator (U708) on
Radio Module. In addition to the external memory
devices, U709 has 768 bytes of RAM and 640 bytes of
EEPROM.
Functions
The microprocessor has two basic functions: interfac-
ing with the outside world and controlling the internal
workings of the radio. The microprocessor interfaces
directly with the keypad, side buttons, PTT, rotary
switch, battery low indicator, EXT PTT and volume
sense. The microprocessor constantly monitors these
inputs and interprets any changes into commands that
control the rest of the radio. Some control functions it
performs include loading the synthesizer with the
desired RF frequency, turning the RF PA on or off,
enabling and disabling audio and data paths and gen-
erating tones. Operations and operating conditions
within the radio are interpreted by the microprocessor
and fed back to the operator as visible (the display) or
audible (alert tone) indications of current status.
Normal Operation
The regulated 5V output from U704 powers the micro-
processor (U709) and the rest of the digital IC except
ASFIC (U701). The microprocessorÕs clock is generated
by the ASFIC, which has a built-in programmable clock
synthesizer.
Clock Synthesizer
Upon power-up and assuming that the ASFIC receives
a proper 2.1 MHz input on U701-P38 (which comes
from the transceiver board), the ASFIC outputs a
7.776 MHz CMOS square wave (0-5Vpp logic) on
U701-P30, which connects to the EXTAL input of the
microprocessor, U709-P73. The microprocessor oper-
ates at 1/4 of this frequency, which in this case com-
putes to 1.944 MHz. In particular, the E clock output
(U709-P72) will be a 50% duty cycle square wave at this
frequency.
Bus Operation
The microprocessor operates in expanded memory
mode and executes Þrmware contained in OTP/
FLASH ROM, U705. The microprocessor uses a non-
multiplexed address data bus, consisting data lines D0
through D7 and address lines A0-A17. In addition, the
microprocessor has integrated chip-select logic so that
external memories can be accessed without the need
for external address decoder gates. These chip-select
signals are provided by U709-P28 and P29.
When the controller board is functioning normally,
microprocessorÕs address and data lines should be tog-
gling at CMOS logic levels. SpeciÞcally, the logic-high
levels should be between 4.8 and 5.0V, and the logic-
low levels should be between 0 and 0.2V.
RAM
The on-chip 768 byte static RAM from U709 provides
some scratch-pad memory, with the bulk of it coming
from the external 8 or 32Kbyte SRAM, U706. External
SRAM accesses are indicated by the U709-P28. Nor-
mally SRAM is accessed less often than the OTP/
FLASH ROM, U705; i.e. the number of transitions per
second on U705 chip select (pin 30) should be 5-15
times higher than those on U706 pin 20.
EEPROM
The radio codeplug storage is provided by 640 byte
EEPROM, with an additional memory space (4 Kbyte
for GTX models and 4 Kbyte or 8 Kbyte for LTS mod-