Motorola GP series, Detailed Service Manual

Page: 450 / 494

1-6 THEORY OF OPERATION
4.0 Frequency Generation Circuit
( Refer to Figure 2-3 and the 800 MHz Frequency Synthesizer schematic diagram )
The frequency generation circuit is shown in Figure 2-21. The circuit is composed of the two main
ICs:
■
Fractional-N synthesizer, U201
■
VCO/Buffer IC, U250
Figure 1-3 800 MHz Frequency Generation Unit Block Diagram
Designed in conjunction to maximize compatibility, the two ICs provide many of the functions that
normally would require additional circuitry. The synthesizer block diagram illustrates the
interconnect and support circuitry used in the region. Refer to the relevant schematics for the
reference designators.
The synthesizer is powered by regulated 5V and 3.3V which come from U247 and U248
respectively. The synthesizer in turn generates a superfiltered 4.5V which powers U250.
In addition to the VCO, the synthesizer must interface with the logic and ASFIC circuitry.
Programming for the synthesizer is accomplished through the data, clock and chip select lines from
the microprocessor. A 3.3V dc signal from synthesizer lock detect line indicates to the
microprocessor that the synthesizer is locked.
Transmit modulation from the ASFIC is supplied to pin10 of U201. Internally the audio is digitized by
the Fractional-N and applied to the loop divider to provide the low-port modulation. The audio runs
through an internal attenuator for modulation balancing purposes before going out to the VCO.
Synthesizer
U201
VCOBIC
U250
Voltage
Multiplier
Dual
Transistor
Loop
Filter
Injection
Amplifier
Buffer
Amplifier
To Mixer
To PA Driver
VCP
Vmult1
Vmult2
Aux3
Aux4
MOD Out
Modulating
Signal
Rx VCO
Circuit
Tx VCO
Circuit
TRB
16.8 MHz
Ref. Osc.
Rx
Out
Tx
Out