DSP56824ADM Technical Summary
Jumper Configuration
MOTOROLA
DSP56824ADM User’s Manual
2-9
Operating Mode 0 or 2. Table 2-3 shows the JG2 selection to achieve any of the four
operating modes available on the DSP56824.
Note:
The DSP56824ADM is factory configured to exit from reset in Mode 2.
2.6.4
Program Memory Configuration
Jumper group JG3 selects the external program static RAM memory configuration. For
fastest operation with the installed 10 ns FSRAM, jumper pins JG3 1–2 and 3–4, and
configure the Bus Control Register (BCR) for zero wait states. Program memory will then
occupy address range P:$0–$FFFF.
If the NVSRAM is used, jumper pins JG3 5–6 and JG13 1–2. The program Static RAM
occupies address range P:$0–$7FFF, and the NVSRAM occupies address range
P:$8000–$FFFF. The delay from gating address line A15 with PS requires that the BCR
must be configured for at least one wait state while executing out of external program
memory. The NVSRAM offers a means of executing programs and loading memory as
required from its non-volatile memory after exiting reset. See Table 2-4 for JG3 and JG13
program memory configuration.
Table 2-3
Operating Mode Selection
Operating Mode
JG2
Comment
0
1–2, 3–4
Bootstrap from byte-wide EPROM
1
3–4
Bootstrap from SPI0 or SSI Port
2
1–2
Normal Expanded P:$E000 (default)
3
No jumpers
Development P:$0000
Summary of Contents for DSP56824ADM
Page 6: ...vi DSP56824ADM User s Manual MOTOROLA ...
Page 9: ...MOTOROLA DSP56824ADM User s Manual 1 1 SECTION 1 QUICK START GUIDE ...
Page 16: ...1 8 DSP56824ADM User s Manual MOTOROLA Quick Start Guide Installation Procedure ...
Page 17: ...MOTOROLA DSP56824ADM User s Manual 2 1 SECTION 2 DSP56824ADM TECHNICAL SUMMARY ...
Page 41: ...MOTOROLA DSP56824ADM User s Manual A 1 APPENDIX A DSP56824ADM SCHEMATICS ...
Page 52: ...A 12 DSP56824ADM User s Manual MOTOROLA DSP56824ADM Schematics ...
Page 53: ...MOTOROLA DSP56824ADM User s Manual B 1 APPENDIX B DSP56824ADM BILL OF MATERIALS ...