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2-26
DSP56309UM/D MOTOROLA
Signal/Connection Descriptions
Enhanced Synchronous Serial Interface
SCK0
PC3
Input/
Output
Input or
Output
Input
Serial Clock
ÑSCK0 is a bidirectional
Schmitt-trigger input signal providing the
serial bit rate clock for the ESSI interface. The
SCK0 is a clock input or output used by both
the transmitter and receiver in synchronous
modes or by the transmitter in asynchronous
modes.
Although an external serial clock can be
independent of and asynchronous to the DSP
system clock, it must exceed the minimum
clock cycle time of 6 T (i.e., the system clock
frequency must be at least three times the
external ESSI clock frequency). The ESSI
needs at least three DSP phases inside each
half of the serial clock.
This signal is driven by a weak keeper after
reset.
Port C 3
ÑThe default configuration
following reset is GPIO input PC3. When this
port is configured as PC3, signal direction is
controlled through PRR0. The signal can be
configured as an ESSI signal SCK0 through
PCR0.
SRD0
PC4
Input/
Output
Input or
Output
Input
Serial Receive Data
ÑSRD0 receives serial
data and transfers the data to the ESSI receive
shift register. SRD0 is an input when data is
being received.
This signal is driven by a weak keeper after
reset.
Port C 4
ÑThe default configuration
following reset is GPIO input PC4. When this
port is configured as PC4, signal direction is
controlled through PRR0. The signal can be
configured as an ESSI signal SRD0 through
PCR0.
Table 2-12
Enhanced Synchronous Serial Interface 0 (ESSI0) (Continued)
Signal
Name
Type
State
During
Reset
Signal Description
Summary of Contents for DSP56309
Page 25: ...xxii DSP56309UM D MOTOROLA Figure D 25 Port E Registers PCRE PRRE PDRE D 39 ...
Page 30: ...MOTOROLA DSP56309UM D 1 1 SECTION 1 DSP56309 OVERVIEW ...
Page 47: ...1 18 DSP56309UM D MOTOROLA DSP56309 Overview DSP56309 Architecture Overview ...
Page 48: ...MOTOROLA DSP56309UM D 2 1 SECTION 2 SIGNAL CONNECTION DESCRIPTIONS ...
Page 85: ...2 38 DSP56309UM D MOTOROLA Signal Connection Descriptions OnCE JTAG Interface ...
Page 86: ...MOTOROLA DSP56309UM D 3 1 SECTION 3 MEMORY CONFIGURATION ...
Page 104: ...MOTOROLA DSP56309UM D 4 1 SECTION 4 CORE CONFIGURATION ...
Page 124: ...MOTOROLA DSP56309UM D 5 1 SECTION 5 GENERAL PURPOSE I O ...
Page 125: ...5 2 DSP56309UM D MOTOROLA General Purpose I O 5 1 INTRODUCTION 5 3 5 2 PROGRAMMING MODEL 5 3 ...
Page 128: ...MOTOROLA DSP56309UM D 6 1 SECTION 6 HOST INTERFACE HI08 ...
Page 166: ...MOTOROLA DSP56309UM D 7 1 SECTION 7 ENHANCED SYNCHRONOUS SERIAL INTERFACE ESSI ...
Page 212: ...MOTOROLA DSP56309UM D 8 1 SECTION 8 SERIAL COMMUNICATION INTERFACE SCI ...
Page 241: ...8 30 DSP56309UM D MOTOROLA Serial Communication Interface SCI GPIO Signals and Registers ...
Page 242: ...MOTOROLA DSP56309UM D 9 1 SECTION 9 TRIPLE TIMER MODULE ...
Page 269: ...9 28 DSP56309UM D MOTOROLA Triple Timer Module Timer Operational Modes ...
Page 270: ...MOTOROLA DSP56309UM D 10 1 SECTION 10 ON CHIP EMULATION MODULE ...
Page 302: ...MOTOROLA DSP56309UM D 11 1 SECTION 11 JTAG PORT ...
Page 369: ...C 22 DSP56309UM D MOTOROLA DSP56309 BSDL Listing ...
Page 370: ...MOTOROLA DSP56309UM D D 1 APPENDIX D PROGRAMMING REFERENCE ...
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