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VSC8634/VSC8664 Evaluation Board

VPPD-03084 VSC8634/VSC8664 User Guide Revision 1.1

3

3

General Description

The evaluation board (Figure 1) provides the user a way to evaluate the VSC8664 device in multiple 
configurations. Only two of the 4 PHY ports are used on this board. Two RJ-45 connectors are provided 
for copper media interfaces. And two SFP cages facilitate fiber media interconnects. The MAC interface 
is provided only via SMA connectors.

For access to all of the features of the device, an external microcontroller is used to configure the on-
board clock chip via a two wire serial bus and the VSC8664 via the MDIO bus. The graphical user 
interface (GUI) enables the user to access the registers.

The evaluation board uses a Zarlink device to synthesize a 25 MHz reference clock signal from a 20 MHz 
crystal which serves as the REFCLK input.

3.1

Key Features

3.1.1

Copper Port RJ45 Connections

PHY Port 3 (J0) uses the UDE RTA 1648BAK1A with integrated transformer while PHY Port 0 (J3) uses a 
generic RJ45 connector with discrete transformer (Pulse H5008).

3.1.2

SGMII/QSGMII MAC SMA

SGMII SMA connections are provided for the two exposed PHYs.

3.1.3

Switch Block Control

Confirm the SW1 switch positions as shown in the figure below, positions 1 and 2 to “OFF”, positions 3 
and 4 to “ON”. ON = Logic 0, OFF = Logic 1.

Figure 2 • SW1 Switch Control

3.1.4

Zarlink ZL30143 SyncE G.8262/SETS

The ZL30143 is initialized by default to provide a 25MHz LVPECL clock (pin K9) to VSC8664 REFCLK
/XTAL1 input pin.

The ZL30143 can support synchronization with the VSC8664 PHY recovered clock for Sync-E operation, 
contact Microsemi for more information.

3.1.5

Network Interface Microcontroller Card

A “Rabbit” microcontroller card is included to facilitate a software interface to the registers on the 
VSC8664. The controller card has a hard coded static IP address. Refer to the label on the card for the 
value. This address is required by the user to initiate communications via the board and the GUI.

Note: The factory programmed Rabbit board IP address is: 10.9.70.193.

Summary of Contents for VSC8634

Page 1: ...VSC8634 VSC8664 User Guide VSC8634 VSC8664 Evaluation Board...

Page 2: ...Card 3 4 Quick Start 4 4 1 Connecting the Power Supply 4 4 2 PC Software Installation 4 4 3 Connecting the Board to the PC 4 4 3 1 Changing the IP Address of the Board 4 4 4 Using the Control Software...

Page 3: ...s that were implemented in the document The changes are listed by revision starting with the most current publication 1 1 Revision 2 0 Revision 1 1 was published in April 2014 In this revision the VSC...

Page 4: ...4 VSC8664EV The board may be used to evaluate a family of devices which include the VSC8634 VSC8662 and VSC8664 These devices vary with respect to the number of ports supported interfaces and availabl...

Page 5: ...he UDE RTA 1648BAK1A with integrated transformer while PHY Port 0 J3 uses a generic RJ45 connector with discrete transformer Pulse H5008 3 1 2 SGMII QSGMII MAC SMA SGMII SMA connections are provided f...

Page 6: ...nd write down the new unique IP address you wish to change the board to Directly connect an Ethernet cable from a PC to the Rabbit board Note Some older PCs do not support auto crossover on the Ethern...

Page 7: ...r network configuration until connection with the EVB can be successfully established 4 4 1 Copper Media Operation 1000BASE T To run traffic through the VSC8664 s copper port simply loopback the MAC s...

Page 8: ...SE X To run traffic through the VSC8664 s fiber port simply loopback the MAC side using coax cables connect the media side to a traffic source configure the device registers as indicated below and wat...

Page 9: ...enables a user to load a script to configure the device rather than navigating through Registers pages A sample script showing write read commands is shown in Figure 5 The script syntax is command ph...

Page 10: ...VSC8634 VSC8664 Evaluation Board VPPD 03084 VSC8634 VSC8664 User Guide Revision 1 1 8 Figure 5 Run PHY Script Window After a Script is Loaded Figure 6 Run PHY Script Window After a Script is Loaded...

Page 11: ...1 Ethernet Packet Generator ExtMII 29E is the Ethernet Packet Generator register Refer to the datasheet for configuration options A Good CRC packet counter is in ExtMII 18 13 0 A read of the register...

Page 12: ...ion Board VPPD 03084 VSC8634 VSC8664 User Guide Revision 1 1 10 5 Additional Information For any additional information or questions regarding the device s mentioned in this document contact your loca...

Page 13: ...dently determine suitability of any products and to test and verify the same The information provided by Microsemi hereunder is provided as is where is and with all faults and the entire risk associat...

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