Frequency Synthesizer
The serial controller requires a base clock which is used by the baud rate generator (BRG) to create data
clocks. A data clock may be output on the AUXCLK signal or used internally for a synchronous data clock,
an asynchronous sampling clock, or for DPLL clock recovery.
The card has a fixed frequency oscillator and a variable frequency synthesizer. Either source can supply
the base clock. The oscillator is used as the synthesizer reference clock input. Serial controller GPIO
signals program the synthesizer through an SPI interface and select between the oscillator and
synthesizer outputs. The base clock is common to all ports in the controller.
The synthesizer is made by Integrated Device Technologies (IDT). Refer to the documentation available
from IDT (
) for details on programming the synthesizer. An IDT supplied program
(Versaclock) generates programming data (132 bit value) for a specific frequency output. The CLK1
output of the synthesizer is used, CLK2 and CLK3 are unconnected. Sample code for programming the
synthesizer through the GPIO portion of the serial API is available from Microgate. The maximum
synthesizer frequency supported by the serial controller is 80MHz.
The default oscillator frequency is 14.7456MHz. Other frequencies are available by special order. By
default the serial controller uses the oscillator as the base clock.
Fixed Frequency
Oscillator
0
Serial Controller
Base Clock
GPIO[15]
GPIO[12]
GPIO[13]
GPIO[14]
ICS307-3
Frequency Synthesizer
DATA IN (DI)
SELECT (CS)
CLOCK (SCLK)
CLK1
1
SELECT
SPI
Reference
Frequency
