OS8121X Slim Board Family
DS60001523A-page 14
2017 Microchip Technology Inc.
2.2
PRODUCT FEATURES
• Detached interface between application hardware and network
• Supports a network speed grade of 50 Mbits/s
• Available for electrical physical layer (ePHY) applications
• Configuration/Debug Header Connector
• Offers connection capabilities to the USB port
• Lock detection monitor (Lock LED)
• The USB master board is identified in the network by its node address 0x0200
• The USB slave board is identified in the network by its node address 0x02B0
2.3
FUNCTIONAL DESCRIPTION
gives an overview of the board’s main components.
An OS81210 USB Application Board provides an electrical Physical Layer (ePHY)
interface to the network. The electrical interface is implemented with passive front-end
components [
]. If the board is connected with the Power Injector Box, the 12 V of the
box are used to feed the on-board power supply, which provides 1.8 V INIC core supply
and 3.3 V for INIC I/Os and other components. As long as the output voltage of the
power supply is not stable, the INIC will be hold in reset.
The
Configuration/Debug Header Connector
is used to read, load or customize the
INIC’s initial start-up configuration data.
The USB connector is used to connect the board to USB applications. For more infor-
mation refer to the INIC Hardware Data Sheet [
]. If the Power Injector Box is not con-
nected, the board can also be powered via the USB connector.
FIGURE 2-2:
BLOCK DIAGRAM
INIC
Configuration/
Debug Header
Connector
1.8 V
3.3 V
Power Supply
Network
and
PoDL
12 V
USB
5 V
Physical
Layer
Interface
USB
Connector
Reset
