MIC23656
EVALUATION BOARD
USER’S GUIDE
2018 Microchip Technology Inc.
DS50002815A-page 32
Appendix C. MIC23656 Internal Registers
C.1
REGISTER MAP AND I
2
C PROGRAMMABILITY
The MIC23656 internal registers are summarized in
TABLE C-1:
MIC23656 REGISTER MAP
Address
Register Name
0x00
Control Register (CTRL1)
TON<1:0>
ILIM<1:0>
EN_DELAY<1:0>
EN_INT
EN_CON
0x01
Output Control Register (CTRL2)
DIS_100PCT
FPWM
OT_LATCH
PULL_DN
SLEW_RATE<3:0>
0x02
Output Voltage Register (VOUT)
VO<7:0>
0x03
STATUS and FAULT Register (FAULT)
OT_WARN
EN_STAT BOOT_ERR
SSD
HICCUP
OT
LATCH_OFF
PG
REGISTER C-1:
CTRL1 – CONTROL REGISTER (ADDRESS 0X00)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
TON
ILIM
EN_DELAY
EN_INT
EN_CON
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
RC = Read-then-clear bit
bit 7-6
TON<7:6>:
ON Time
00
= Low Frequency
01
= Medium Frequency
10
= High Frequency
11
= Very Fast Frequency
bit 5-4
ILIM<5:4>:
High-Side Peak Current Limit
00
= 4.5A
01
= 6A
10
= 8.5A
11
= 10.0A
bit 3-2
EN_DELAY<3:2>:
Enable Delay
00
= 250 µs
01
= 1 ms
10
= 2 ms
11
= 3 ms
bit 1
EN_INT:
Enable Bit Register Control
0
= Register Controlled
1
= Enable Controlled
