MCP651 Input Offset Evaluation Board User’s Guide
DS51834A-page 6
©
2009 Microchip Technology Inc.
1.3
INTENDED USE
The MCP651 Input Offset Evaluation Board is intended to provide a simple means to
measure the MCP651 Input Offset Evaluation Board op amp’s input offset voltage
under a variety of operating conditions. The measured input offset voltage (V
OST
)
includes the input offset voltage specified in the data sheet (V
OS
) plus changes due to:
power supply voltage (PSRR), common mode voltage (CMRR), output voltage (A
OL
),
input offset voltage drift over temperature (
Δ
V
OS
/
Δ
T
A
) and 1/f noise.
The MCP651 Input Offset Evaluation Board works most effectively at room tempera-
ture (near 25°C). Measurements at other temperatures should be done in an oven
where the air velocity is minimal.
1.4
DESCRIPTION
This section starts with the conversion of DUT bias voltages described in the MCP651
data sheet to the voltages on this board. Then there is a discussion of the circuitry that
controls the DUT’s output voltage (V
OUTX
) and amplifies its total input offset voltage
(V
OST
). Finally, other portions of the circuit, and their purpose, are discussed. Complete
details of this board are given in
Appendix A. “Schematics and Layouts”
and
Appendix B. “Bill Of Materials (BOM)”
1.4.1
Conversion of Bias Voltages
The MCP651 data sheet describes all of its bias voltages relative to V
SS
, which is
assumed to be at ground (0V). On the other hand, the MCP651 Input Offset Evaluation
Board sets the DUT’s input common mode voltage to 0V. The user needs to convert
from the first set of voltages to the second set (by subtracting V
CM
):
TABLE 1-1:
CONVERSION OF BIAS VOLTAGES
The supply voltages V
DDX
and V
SSX
can be estimated using the MCP651’s typical
quiescent current (I
Q
= 6 mA):
EQUATION 1-1:
Data Sheet Bias Voltage
(V)
Conversion Equations
Evaluation Board Bias Voltage
(V)
V
CM
V
CM
– V
CM
V
CMX
= 0V
V
DD
V
DD
– V
CM
V
DDI
V
SS
V
SS
– V
CM
V
SSI
V
OUT
V
OUT
– V
CM
V
OUTX
V
L
V
L
– V
CM
V
LX
V
CAL
V
CAL
– V
CM
V
CALX
V
DDX
V
DDI
I
Q
10
Ω
(
)
+
V
DDI
60 mV
+
≈
=
V
SSX
V
SSI
I
Q
10
Ω
(
)
–
V
SSI
60 mV
–
≈
=
