MCP43XXEV EVALUATION BOARD
USER’S GUIDE
©
2010 Microchip Technology Inc.
DS51892A-page 33
Appendix A. Schematic and Layouts
A.1
INTRODUCTION
This appendix contains the schematics and layouts for the MCP43XXEV Evaluation
Board. Diagrams included in this appendix:
• Board – Top Trace, Silk and Pads
• Board – Bottom Trace and Pads
• Board – Layer 2 Ground Plane
• Board Layout – Top Components
• Board – Bottom Silk, Trace and Pads
A.2
SCHEMATICS AND PCB LAYOUT
Board – Schematic shows the schematic of the MCP43XXEV Evaluation Board. The
layer order is shown in Figure A-1.
FIGURE A-1:
Layer Order.
Top Layer
Ground Layer
Power Layer
Bottom Layer
