Microchip Technology MCP3422, Manual

Page: 28 / 56

MCP3422/3/4
DS22088B-page 28
©
2008 Microchip Technology Inc.
High Speed Mode (3.4 MHz)
Clock frequency f
SCL
0 — 3.4 MHz C
b
= 100 pF
0 — 1.7 MHz C
b
= 400 pF
Clock high time
THIGH
60 — — ns C
b
= 100 pF, f
SCL
= 3.4 MHz
120 — — ns C
b
= 400 pF, f
SCL
= 1.7 MHz
Clock low time
TLOW
160 — — ns C
b
= 100 pF, f
SCL
= 3.4 MHz
320 — — ns C
b
= 400 pF, f
SCL
= 1.7 MHz
SCL rise time
(Note 1)
TR
— — 40 ns From V
IL
to V
IH
,
C
b
= 100 pF, f
SCL
= 3.4 MHz
— — 80 ns From V
IL
to V
IH
,
C
b
= 400 pF, f
SCL
= 1.7 MHz
SCL fall time
(Note 1)
TF
— — 40 ns From V
IH
to V
IL
,
C
b
= 100 pF, f
SCL
= 3.4 MHz
— — 80 ns From V
IH
to V
IL
,
C
b
= 400 pF, f
SCL
= 1.7 MHz
SDA rise time
(Note 1)
TR: DAT
— — 80 ns From V
IL
to V
IH
,
C
b
= 100 pF, f
SCL
= 3.4 MHz
— — 160 ns From V
IL
to V
IH
,
C
b
= 400 pF, f
SCL
= 1.7 MHz
SDA fall time
(Note 1)
TF: DATA
— — 80 ns From V
IH
to V
IL
,
C
b
= 100 pF, f
SCL
= 3.4 MHz
— — 160 ns From V
IH
to V
IL
,
C
b
= 400 pF, f
SCL
= 1.7 MHz
Data hold time
(Note 4)
THD:DAT
0 — 70 ns C
b
= 100 pF, f
SCL
= 3.4 MHz
0 — 150 ns C
b
= 400 pF, f
SCL
= 1.7 MHz
Output valid from clock
(Notes 2 and 3)
TAA
— — 150 ns C
b
= 100 pF, f
SCL
= 3.4 MHz
— — 310 ns C
b
= 400 pF, f
SCL
= 1.7 MHz
START condition hold time
THD:STA
160 — — ns After this period, the first clock
pulse is generated
START (Repeated) condition
setup time T
SU:STA
160 — — ns
Data input setup time
TSU:DAT
10 — — ns
STOP condition setup time
TSU:STO
160 — — ns
TABLE 5-4: I
2
C SERIAL TIMING SPECIFICATIONS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all limits are specified for T
A
= -40 to +85°C, V
DD
= +2.7V to +5.0V,
V
SS
= 0V, CHn+ = CHn- = V
REF
/2.
Parameters Sym Min Typ Max Units Conditions
Note 1: This parameter is ensured by characterization and not 100% tested.
2: This specification is not a part of the I
2
C specification. This specification is equivalent to the Data Hold Time (
THD:DAT
)
plus SDA Fall (or rise) time:
TAA
= T
HD:DAT
+ T
F
(
OR
T
R
).
3: If this parameter is too short, it can create an unintended Start or Stop condition to other devices on the bus line. If this
parameter is too long, Clock Low time (T
LOW
) can be affected.
4: For Data Input: If this parameter is too long, the Data Input Setup (T
SU:DAT
) or Clock Low time (T
LOW
) can be affected.
For Data Output: This parameter is characterized, and tested indirectly by testing T
AA
parameter.