Hardware Description
2015 Microchip Technology Inc.
DS50002376A-page 23
3.5
JUMPER SETTINGS
This evaluation board has pin headers and jumper configurations to evaluate the
features of the PAC1921. Jumper locations are indicated in
.
FIGURE 3-2:
Jumper and External Connection Locations.
J11
GND
J2
V
SOURCE-
J1
V
J3
Demo Sys
J4
Demo Sys
J13
Connections
J5
Reserved
J6
Reserved
J7
Reserved
J8
ADDR/SEL
Note:
Refer to
Appendix A. “Schematic and Layouts”
to see the
connections of each jumper position.
