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MFJ-4416C Super Battery Booster
Instruction and Technical Manual
Version 0A
12
External Keying Inputs:
Four external signals may enable the SMPS boost. Two negative
going signals are inputted through X1 pins 1 and 2. These signals are ORed by D6 and pulled up
by R30. Q6 acts as an inverter to produce a positive going signal that saturates Q7 grounding the
enable line. Two positive going signals are inputted through X1 pins 3 and 4. These signals are
ORed by D8 and fed to Q7. These signals directly saturate Q7 grounding the enable line. Each
input line has a low pass filter to protect the unit from RF conducted from the transmitter and
EMI conducted back to the receiver. A 100 mA auto-reset fuse is used to feed DC input voltage
to pin 5 for powering external accessories.
Low Battery Voltage Enable:
When enabled by HDR5 a low voltage on the input terminals
may automatically enable the SMPS boost circuitry. HDR4 selects the trigger voltage level as 10,
11 or 12 volts. The 5 volt reference voltage supplied from the SMPS controller IC is used as a
voltage reference for the trigger circuit IC2C. R36 and the resistor selected by HDR4 form a
voltage divider used to compare against the reference voltage to set to low voltage trigger limit.
When the low limit is reached the output of IC2C goes low discharging C41 through D9 and
R40. IC2D acts as a high input impedance comparator against the reference voltage and when
C41 is discharged the output of IC2D goes to ground which through HDR5 enables Q6 and
through Q7 grounds the enable line. When the input voltage rises above the low limit
potentiometer R41, R40 and C41 provide an adjustable time delay holding the SMPS boost on.
The delay is to allow current peaks during SSB and CW that pull that battery low and trigger the
SMPS to be held allowing a continuous SMPS boost output to assure a constant voltage is
provided to the transmitter.
Low Voltage Lockout:
HDR1 sets the low voltage limit that the SMPS boost is allowed to
operate. When the input voltage is below the low limit the SMPS boost is disabled by saturating
Q8 grounding the soft start line on IC1. The low voltage lockout maybe transient during the
period the input voltage is low or maybe latched requiring power to be removed to reset the
latch. The latching of the low voltage lockout is selected by HDR2. HDR1 selects an input
resistor that with R16 form a voltage divider that with IC2A compare the input voltage to the
reference voltage from IC1. HDR1 allows the limit to be set at 9, 10 and 11 volts. R14 provides
feedback that sets the hysteresis of the comparator. The output of IC1A is pulled up by R15 and
fed to D7. D7 feeds a negative going signal to Q4 which saturates Q5 illuminating the red LED
and if HDR3 is present sounding the audio alert. D7 feed R23 which along with C33, IC2B and
R22 form a time delay to minimize false trips of the lockout by transient voltage drops. The
output of IC2B is normally low and is pulled up by R21. When the low voltage lockout is
triggered IC2B output goes high feeding the low voltage disable signal through D10 saturating
Q8 and disabling the SMPS boost circuit. Q3 is also saturated and if HDR2 is in place grounds
the input voltage divider latching the lockout until the input power is removed.
Remote Control Input:
An 8 pin RJ45 jack is provided to allow connection to the remote
control unit. Each signal pin is bypassed to ground by EMI suppression capacitors. The Low
voltage signal and enable signals are accessed by this jack. Input and output voltages are also
present and protected by 100 mA auto-reset fuses.
Summary of Contents for MFJ-4416C
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