MeiG Smart product technical information
SLM500
Hardware Design Guide
Page 40
4.6.2.MIPI Camera Interface
The SLM500 module supports the MIPI interface Camera and provides a dedicated
camera power supply. The main camera is a CSI1 interface that supports four sets of data lines
and can support up to
13M
pixels. The front camera is a CSI0 interface that supports four sets of
data lines and can support 5M pixels. The module provides the power required by the Camera,
including AVDD-2.8V, IOVDD-1.8V\AFVDD-2.8V (powered by the focus motor) and D-
VDD1.2V (CAM core voltage).
D-VDD1.2V(CAM Core Votage)
Please add external circuit by
yourself
。
Table
4.6
：
MIPI
Camera
Interface
Definition
Main camera interface
Name
Name
Name
Name
GPIO26_MCAM_MCLK0
74
O
Main camera clock signal
GPIO128_MCAM_RST_N
79
O
Main camera reset signal
GPIO126_MCAM_PWDN
80
O
Main camera sleep signal
MIPI_CSI1_CLK_M
63
I
Main camera MIPI clock signal
MIPI_CSI1_CLK_P
64
I
MIPI_CSI1_LANE0_M
65
I/O
Main camera MIPI data signal
MIPI_CSI1_LANE0_P
66
I/O
MIPI_CSI1_LANE1_M
67
I/O
MIPI_CSI1_LANE1_P
68
I/O
MIPI_CSI1_LANE2_M
72
I/O
MIPI_CSI1_LANE2_P
73
I/O
MIPI_CSI1_LANE3_M
70
I/O
MIPI_CSI1_LANE3_P
71
I/O
GPIO29_CAM_I2C_SDA0
84
I/O
I2C data
GPIO30_CAM_I2C_SCL0
83
I/O
I2C clock
VREG_L6_1P8
125
O
1.8V IOVDD
VREG_L16_AVDD
193
O
2.8V
AVDD
VREG_L17_2P85
129
O
2.8V AFVDD
Front camera interface
Name
Name
Name
Name
GPIO28_SCAM_MCLK2
75
O
Front camera clock signal
GPIO129_SCAM_RST_N
81
O
Front camera reset signal
GPIO125_SCAM_PWDN
82
O
Front camera sleep signal
MIPI_CSI0_CLK_M
157
I
Front camera MIPI clock signal
