MAX4888A/MAX4889A
tr < 5ns
tf < 5ns
50%
V
IL
LOGIC
INPUT
V
N_
= V
NO_
OR V
NC_
R
L
COM_
GND
SEL
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
OUT
= V
N_
(
R
L
)
R
L
+ R
ON
V
N_
V
IH
t
OFF
0V
NO_
OR NC_
0.9 x V
0UT
0.9 x V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
V+
C
L
3.3V
V
OUT
MAX4888A/MAX4889A
Figure 1. Switching Time
Test Circuits/Timing Diagrams
5.0Gbps PCI Express Passive Switches
_______________________________________________________________________________________
7