3
Maxim Integrated
Evaluates: MAX9601
MAX9601 Evaluation Kit
Latch Enable
The complementary latch-enable control permits track-
ing, track-hold, or sample-hold modes of operation.
The latch enables can be driven with PECL logic. See
Table 1 for the latch-enable truth table. By default, the
EV kit is configured to operate in compare mode.
LEA
and
LEB
are connected to the VCCOA and VCCOB pads
through resistors R6 and R15 (LEA and LEB signals
need to be provided externally).
Output Termination
DC-Coupled Output to Oscilloscope
The EV kit’s default output termination network provides
the output with a Thevenin equivalent of 50
I
to VCCO_
- 2V, when connected to a 50
I
load to ground. Hence,
the outputs can be conveniently connected directly to
an oscilloscope’s 50
I
input. The termination network
provides a 4x output signal attenuation. If only one of
the serial-data outputs is connected to an oscilloscope,
ensure that the other is still properly terminated. Keep
in mind that the resistor networks at each output pro-
vide proper termination only when they are terminated
through 50
I
to ground.
AC-Coupled Output to Oscilloscope
The output can also be AC-coupled to the next stage.
While AC-coupling the output, remember that the IC
has an open-emitter output. Hence the output must
have a DC path provided with suitable external pull-
down resistors. Also, the resultant current sourced by
the output stage must not exceed the output current
capability of the part. For example, to AC-couple the QA
output to a 50
I
input oscilloscope, short resistor R19.
Replace resistor R2 with 125
I
and R27 with 187.5
I
. This
provides a DC Thevenin equivalent of 75
I
to VCCO - 2V.
Now replace resistor R1 with 49.9
I
resistor and populate
capacitor C1 with a suitable low-loss, high-frequency
capacitor. With good coupling, the AC load adds an
additional 8mA of output current only, since capacitor C1
blocks the DC component of the PECL output.
Alternative PECL Output Termination
Alternative PECL output termination methods can be
used for different logic interfaces as long as they pro-
vide a DC Thevenin equivalent of 50
I
to VCC - 2V. For
example, to interface QA with a PECL or high-impedance
input, short resistors R1 and R19, and replace R27 with
a 124
I
resistor. To interface QA with a PECL input test
equipment, which is internally terminated with 50
I
to
VCCO_ - 2V, take the following steps:
1) Remove resistors R2 and R27.
2) Short resistors R1 and R19.
3) Place a bias-T in series between the MAX9601 and
the test equipment. Connect the bias-T’s RF and DC
terminals to the QA output and the RF terminal to
the test equipment’s PECL input. Then connect the
DC terminal to a VCCO_ - 2V termination voltage
through a 50
I
resistor.
Layout
The EV kit uses a two-layer board for simplicity. However,
special layout precautions have been taken due to the
large gain-bandwidth characteristics of the MAX9601.
The 0.01
F
F power-supply decoupling capacitors are
mounted as close as possible to the power-supply input
pins. The inductance of the return path is reduced by
flooding the ground plane with multiple vias. Multiple
ground vias are also present besides the decoupling
capacitors and signal traces to shorten the ground
return path and maximize isolation. The lead lengths
on the inputs and outputs are minimized to avoid
unwanted parasitic feedback around the comparators.
Microstrip layout and terminations are used at both the
inputs, as well as the outputs, to reduce signal reflec-
tions. Layer 2 is a continuous ground plane with no
signal or power traces. Impedance discontinuities have
been minimized by routing all the signal traces on the
top layer only, with no interconnecting vias or sharp cor-
ners. Edge-mount SMA connectors are used to reduce
the capacitive discontinuity and maximize frequency
response. The symmetric layout also minimizes the skew
due to the traces.
Test Setup
Note that a test setup optimized for high-speed mea-
surement is essential to observe the true performance of
the MAX9601 device. Use matched SMA cables for the
differential inputs and outputs. Also, account for the time
delay and skew of the test setup. For accurate measure-
ment of the device’s rise and fall times, an oscilloscope
with a bandwidth several times larger than the maximum
signal frequency must be used.
Table 1. Latch-Enable Truth Table
LATCH-ENABLE INPUT
OPERATION
LE_
LE_
0
1
Compare mode (output follows
input state)
1
0
Latch mode (output latches to
last known output state)
0
1
Invalid condition (output is in
unknown state)
1
0
