MAX32600 User’s Guide
System Clock, Timers/Counters, Watchdog Timers and Real Time Clock
10.1 System Clock
10.1.5.1.2
CLKMAN_CLK_CTRL
CLKMAN_CLK_CTRL.system_source_select
Field
Bits
Default
Access
Description
system_source_select
2:1
no effect
R/W
System Clock Source Select
• 00b: 24MHz Relaxation Osc output (divided by 8)
• 01b: 24MHz Relaxation Osc output (undivided)
• 10b: HFX Input
• 11b: PLL 48MHz output (divided by 2)
Read value is actual mux select, and may lag value written by several clocks due to glitchless clock switching circuit.
CLKMAN_CLK_CTRL.auto_clk_disable
Field
Bits
Default
Access
Description
auto_clk_disable
3
no effect
R/W
Auto Clock Disable
1: Automatically disables HFX and PLL Enables and restores system clock mux to use System RO when going into LP1.
CLKMAN_CLK_CTRL.usb_gate_n
Field
Bits
Default
Access
Description
usb_gate_n
4
0
R/W
USB Clock GateN
Gates off USB clock when asserted to 0 (active low)
Rev.1.3 April 2015
Maxim Integrated
Page 517
