Maxim Integrated MAX32600, User Manual, Page: 527 / 687

MAX32600 User’s Guide System Clock, Timers/Counters, Watchdog Timers and Real Time Clock 10.1 System Clock
via CLKMAN_CLK_CONFIG register.
CLKMAN_CLK_CONFIG field Function
crypto_enable Enable the Crypto Relaxation Oscillator
crypto_reset_n Active low holds the Crypto Relaxation Oscillator in reset state
crypto_stability_count Crypto Relaxation Oscillator stability select
10.1.4 ADC Clock Source Configuration
The ADC requires a clock with a frequency of 8MHz or lower. Additionally, 16-19 clock cycles based on the Programmable Gain Amplifier (PGA) gain are required to
perform a conversion. The ADC will operate with a clock frequency less than 8MHz; however, operating the ADC at 8MHz optimizes minimum power consumption
(the ADC only consumes power when clocked). The ADC clock selection block is shown
below .
Figure 10.5: ADC Clock Source Block Diagram
Rev.1.3 April 2015 Maxim Integrated Page 509