31
Analog Pins
Name
Type
Description
BYP
—
The RF AGC integration capacitor CBYP, is connected between BYP and VPA.
CP
—
DIFFERENTIAL PHASE TRACKING LPF PIN: The external capacitance is connected between CN.
CN
—
DIFFERENTIAL PHASE TRACKING LPF PIN: The external capacitance is connected between CP.
LCP
—
LENS SHIFT OFFSET CANCEL LPF PIN: The external capacitance is connected between LCN.
LCN
—
LENS SHIFT OFFSET CANCEL LPF PIN: The external capacitance is connected between LCP.
MP
—
MIRR TOP HOLD PIN: The external capacitance is connected to VPB.
MB
—
MIRR BOTTOM HOLD PIN: The external capacitance is connected to VPB.
MEV
—
RFDC BOTTOM ENVELOPE PIN: The external capacitance is connected to VPA.
MLPF
—
MIRROR LPF PIN: An external capacitance is connected to VPB.
TPH
—
PI TOP HOLD PIN: An external capacitance is connected to VPB.
VC
—
REFERENCE VOLTAGE OUTPUT: This pin provides the DC bias reference voltage (VPB/2). Output impedance is less
than 50
Ω
.
V125
—
REFERENCE VOLTAGE OUTPUT: DC bias voltage output and it is also used for servo output reference. (V25/2)
RX
—
REFERENCE RESISTOR INPUT: An external 12.0 k
&
, 1 % resistor is connected from this pin to ground to establish a
precise PTAT (proportional to absolute temperature) reference current for the fi lter.
DVDRFP
DVDRFN
RFS I N
AT
O
P
AT
O
N
AI
N
AIP
FN
P
DIN
DI
P
RF
A
C
FN
N
MUX
I NPUT
B I AS
A T T
6 3
A
1 2
CD_ A
1 6
B
1 1
CD_ B
1 5
C
1 0
CD_C
1 4
D
CD_D
1 3
CD_ E
1 8
CD_ F
1 7
2
9
A 2
3
1
I NPUT
SE L
I NPUT I MP
SE L
2
I NPUT I MP
SE L
2
2
4
AT T
6 2
6 1
6 0
5 9
AGC
PROGRAM MAB L E
EQUA L I ZER
F I L T ER
D I F F ERENT I A TOR
AGCO
5 3
5 2
SSOUT
C l amp
& E n v
L e v e l
DAC
S I GDET
FU L L WAVE
RECT I F I ER
OUTPUT I NH I B I T
FROM S - PORT
5 5
5 4
5 7
5 6
AGC
CHARGE
PUMP
FAST A t t a c k o f f
AGC HOL D
B +D
A +C
A +D
B +C
MUX
D
C
B
A
GCA
GCA
GCA
GCA
GCA
GCA
GCA
GCA
W / L PF
W / L PF
W / L PF
W / L PF
SUM
Amp .
1 2 d B i s a d d e d
@ h i g h g a i n mo d e
1 2 d B i s a d d e d
@ h i g h g a i n mo d e
6 d B i s a d d e d
@ h i g h g a i n mo d e
1 2 d B i s a d d e d
@ h i g h g a i n mo d e
3
3
4
FROM
S - PORT
FROM
S - PORT
FROM
S - PORT
FROM
S - PORT
CD / DVD
GCA
4 d B
O f f s e t
c a n s e l
L P F
GCA
7 0 k H z
6 d B , 4 b i t
6 d B , 4 b i t
4 d B
4
4
FROM
S - PORT
FROM
S - PORT
5
O f f s e t
c a n s e l
L P F
7 0 k H z
FROM
S - PORT
FROM
S - PORT
FROM
S - PORT
FROM
S - PORT
5
TOPH LD
BCA DE T
- 6d B @ n o r ma l
COMP
P l l
SE L
BYP
4 9
RX
4 0
FE
3 8
P I
3 5
TPH
3 4
DF T
RFDC
DAC
2
B u f f
6 1
CE
4 1
MNTR
TOPHOLD
TOPHOLD
6 d B
Amp
O f f s e t
c a n s e l
GCA
GCA
SE L
MNTR
Cn t r l
P I
FE
TE
CE
V 2 5
V 1 2 5
V 2 5 / 3
4 2
LCP
4 4
LCN
4 3
TE
CP
L PF
AT T
P o l s e l .
b u f f ( -12 d B )
HL DEN
3
3
CE - A T T
CEPOL
+ 3 d B
GCA
GCA
GCA
7
CN
8
O f f s e t
c a n s e l
L P F
GCA
SUB
MUX
TE
RS T
3 9
V 2 5
3 7
V 1 2 5
3 6
VC
2 0
SDEN
4 8
SDAT A
4 7
SC L K
4 6
V 3 3
4 5
FROM
S - PORT
6
CE FDB
CD / DVDCP / CN
L o w l mp
EQ
B 2
4
C2
5
D2
CDPD
6
GCA
GCA
GCA
PHASE
DETECTOR
PHASE
DETECTOR
EQ
EQ
EQ
3
3
VC
Comp .
V 2 5 /2
f o r s e r v o o u t p u t r e f .
VC=VPB / 2
V C I f o r s e r v o i n p u t
SER I A L PORT
REG I STER
V 3 3 f o r
o u t p u t b u f f
MI
R
R
2 7
LI
N
K
VPA
5 8
VPB
1 9
VNA
5 1
VNB
2 5
3 3
MB
2 9
MP
2 8
ML
P
F
3 0
MI
N
3 1
ME
V
O
3 2
ME
V
L I NKEN
M I RR
COMP
Comp
h y s & o f f s e t
F r om S - p o r t
CONTROL
S i g n a l s
T o e a c h b l o c k
PEAK /
BOT TOM
HOLD
I n t e r n a l
FDCHG
D i s k d e t &
M i r r L PF
F r om S - p o r t
2
2
2
M i r r g a i n
F r om S - p o r t
I NPUT
BUF F
I n p u t l mp
F r om S - p o r t
MUX
P l l
5 0
DVD
L
D
2 1
CD
L
D
2 2
LD
O
N
2 6
BOT TOM
ENVE LOPE
AGCO
S i n k c u r r e n t
F r om S - p o r t
D u a l APC
2 4
DVDPD
2 3
APC SE L
DVD / CD
F r om S - p o r t
LD H / L
Q101 : CXD1881R
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