Marantz DV9600, Service Manual

Page: 126 / 207

[PM01] Q304 : CS8420
99 MCLK Audio Master Clock
100 VDD2 2.5V Supply Voltage
101 VSS2 2.5V Ground
102 I/O AUDATA4,
GPIO28
Digital Audio Output 4, General Purpose I/O
103 I/O HDATA4,
GPIO4
DSP C Bidirectional Data Bus, General Purpose I/O
104 O SCLK0 Audio Output Bit Clock
105 I/O HDATA3,
GPIO3
DSP C Bidirectional Data Bus, General Purpose I/O
106 O AUDATA3,
XMT958A Digital Audio Output 3, S/PDIF Transmitter
107 O AUDATA2 Digital Audio Output 2
108 O LRCLK0 Audio Output Sample Rate Clock
109 O AUDATA1 Digital Audio Output 1
110 O AUDATA0 Digital Audio Output 0
111 I CMPCLK,
FSCLKN2 PCM Audio Input Bit Clock
112 I/O HDATA2,
GPIO2
DSP C Bidirectional Data Bus, General Purpose I/O
113 VSS3 2.5V Ground
114 VDD3 2.5V Supply Voltage
115 I/O HDATA1,
GPIO1
DSP C Bidirectional Data Bus, General Purpose I/O
116 I/O HDATA0,
GPIO0
DSP C Bidirectional Data Bus, General Purpose I/O
117 O CMPREQ,
FLRCLKN2 Frame Clock Data Request Out
118 I CMPDAT,
FSDATAN2 PCM Audio Data Input Number Two
119 I FLRCLKN1 PCM Audio Input Sample Rate Clock
120 I/O WR, DS,
GPIO10
Host Write Strobe, Host Data Strobe, General Purpose I/O
121 I/O RD, R/W,
GPIO11
Host Parallel Output Enable, Host Parallel R/W, General
Purpose I/O
122 PLLVSS PLL Ground Voltage
123 FILT2 Phase Locked Loop Filter
124 FILT1 Phase-Locked Loop Filter
125 PLLVDD PLL Supply Voltage
126 O CLKOUT,
XTALO Crystal Oscillator Output
127 I CLKIN, XTALI External Clock Input/Crystal Oscillator Input
128 CLKSEL DSP Clock Select
129 I/O CS, GPIO9 Host Parallel Chip Select, General Purpose I/O
130 I/O A0, GPIO13 Host Parallel Address Bit 0, General Purpose I/O
131 I FSDATAN1 PCM Audio Data Input One
132 VDD4 2.5V Supply Voltage
133 VSS4 2.5V Ground
134 I FSCLKN1,
STCCLK2 PCM Audio Input Bit Clock
135 SCS Host Serial SPI Chip Select
136 I SCDIN SPI Serial Control Data Input
137 VSS5 2.5V Ground
138 VDD5 2.5V Supply Voltage
139 I/O A1, GPIO12 Host Address Bit 1, General Purpose I/O
140 I/O SCDOUT,
SCDIO
Serial Control Port Data Input and Output
141 I/O HINBSY,
GPIO8
Input Host Message Status, General Purpose I/O
142 SCCLK Serial Control Port Clock
143 I/O UHS2,
CS_OUT,
GPIO17
Mode Select Bit 2, External Serial Memory Chip Select,
General Purpose I/O
144 I RESET Master Reset Input
[PM01] Q301 : CS494003 ( CS4900 Family)
158